Overcoming Deceptive Idleness with Anticipatory Scheduling

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Addressing the issue of deceptive idleness in disk scheduling by implementing an anticipatory scheduling framework that leverages prefetching and anticipation core logic. This framework enhances the efficiency of handling synchronous I/O processes to prevent premature decision-making by the scheduler. By incorporating waiting mechanisms and an anticipation heuristic, the system optimizes disk request processing, ensuring timely and appropriate responses to varying workloads.


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  1. Anticipatory scheduling: A disk scheduling framework to overcome deceptive idleness in synchronous I/O Sitaram Iyer Peter Druschel Department of Computer Science, Rice University

  2. Whats the problem? Deceptive Idleness Processes issuing disk requests synchronously Each process issues a new request shortly after its previous request has finished. Scheduler forced to make a decision too early, Assumes that the process issuing the last request has momentarily no further disk requests Selects a request from some other process Incapable of consecutively servicing more than one request from any process.

  3. Solution: Prefetching ? An increasing trend in modern disk- intensive applications issue non-sequential disk requests. nonetheless possess spatial locality has limited utility in these cases

  4. ANTICIPATORY SCHEDULING wrapping given disk scheduling policy in a non-work-conserving anticipatory scheduling framework.

  5. Anticipation Core Anticipation core implements the generic logic and timing mechanisms for waiting relies on the anticipation heuristic to decide if and how long to wait

  6. Anticipation Core traditional work-conserving scheduler has two states: idle and busy forms a wrapper around this traditional scheduler. instead of dequeuing and dispatching immediately, passes this request to the anticipation heuristic for evaluation. zero : no wait positive integer : waiting period in microseconds Sets a timer and enters the new wait state

  7. Anticipation Core Case 1 : timeout expires before the arrival of any new request Case 2 : Arrival of new requests during the waiting period added to the pool. asks the scheduler to select a new candidate request from the pool, and asks the heuristic to evaluate this candidate.

  8. Waiting Mechanism

  9. Anticipation Heuristic

  10. Improvements The Apache webserver:29% and 71% more throughput The Andrew file system benchmark runs faster by 8%, due to a speedup of 54% in its read-intensive phase. TPC-B database benchmark : improvements between 2% and 60%.

  11. EXPERIMENTAL EVALUATION Code and platform : FreeBSD-4.3 kernel Schedulers: All experiments with a seek reducing scheduler use Aged- SPTF(bounded per-request latency of 1 second) Metrics : throughput in MB/s and disk utilization(percentage of real time spent servicing requests)

  12. EXPERIMENTAL EVALUATION Two processes rapidly issue 64 KB disk read requests into separate 1 GB files sequential (seq), or target every alternate 64 KB chunk (alter) or random.

  13. EXPERIMENTAL EVALUATION read system call, FreeBSD 4.3 issues asynchronous prefetch requests if the access pattern is detected to be sequential on disk. map their file into memory using mmap, these are not subject to asynchronous prefetch

  14. Symmetric Process After 8 ms : Thinktime will be comparable to request service time

  15. Asymmetric Process One quick process one (slow) process waits for duration t between requests

  16. The Andrew Filesystem Benchmark capture a typical file server workload in a software development environment. Consists of k clients, each performing five phases:

  17. The Apache Webserver multi-process architecture to service requests from clients. larger 71% improvement for mmap 29% improvement in throughput

  18. The TPC-B database benchmark exercises a database system on simple, random, update-intensive operations into a large database, and is intended to reflect typical bank transactions

  19. Real Hardware 800MHz Athlon system, with a 15,000 rpm Seagate Cheetah ST318451LW SCSI-3 disk and an Adaptec 19160B Ultra160 controller. Specically, repeat two experiments: the microbenchmark with different access patterns Apache webserver experiment

  20. Real Hardware

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