This study explores methods to improve TLB prefetching efficiency by leveraging page table locality, presenting two novel approaches - Sampling-based Free TLB Prefetching (SBFP) and Agile TLB Prefetcher (ATP). These techniques focus on optimizing TLB prefetching mechanisms without disrupting the vir

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Improving single-thread performance in modern processors efficiently is crucial. AVPP proposes optimizations to reduce hardware cost for load value prediction, introducing a new taxonomy of Value Prediction Policies. AVPP outperforms state-of-the-art predictors, providing system performance improvem

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This paper discusses the implementation of an orchestrated scheduling and prefetching mechanism for GPGPUs to enhance system performance by improving IPC and overall warp scheduling policies. It presents a prefetch-aware warp scheduler proposal aiming to make a simple prefetcher more capable, result

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Explore the benefits of prefetching and caching in improving system throughput and reducing latency, while considering energy efficiency. Traditional algorithms are compared, along with strategies for optimal prefetching and replacement to enhance performance and disk utilization efficiency. Learn a

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Addressing the issue of deceptive idleness in disk scheduling by implementing an anticipatory scheduling framework that leverages prefetching and anticipation core logic. This framework enhances the efficiency of handling synchronous I/O processes to prevent premature decision-making by the schedule

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Data prefetching is a crucial technique in computer architecture to enhance performance by fetching data in advance of actual use. Through different methods like stride-based prefetching, history-based prefetching, and reference prediction tables (RPT), processors optimize memory access for improved

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Virtuoso is an open-source, modular simulation framework designed for virtual memory research. The framework aims to address performance overheads caused by virtual memory by proposing solutions like improving the TLB subsystem, employing large pages, leveraging contiguity, rethinking page tables, r

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Discussion on issues and solutions related to instruction cache prefetching, including trigger timing, next-line prefetching, I-Shadow cache, and footprint prediction. Evaluation results show improved performance with FNL methodology compared to traditional prefetching methods.

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