Understanding I2C Bus Interface and Protocol
I2C, short for Inter-Integrated Circuit, is a serial protocol with a two-wire interface designed by Philips. It allows communication between master and slave devices using start and stop conditions. Each slave device has a unique address, and data transfer occurs in serial 8-bit packets at varying speeds. The protocol involves two wires, SCL for serial clock and SDA for serial data, both needing pull-up resistors. Communication is based on generating Start, address, read/write bits, and Stop signals. I2C follows specific data transfer specifications, including clock pulse transfers and Acknowledge bits after each byte. Arbitration is crucial for multiple master devices.
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I2C Bus, Interface and Protocol Prabhas Chongstitvatana Information from: https://i2c.info/
I2C Bus serial protocol, two-wire interface, low speed, invented by Philips control by a master using start and stop conditions
Each slave device has a unique address. Transfer from and to master device is serial and it is split into 8-bit packets. Speed 100 kHz, 400 kHz Fast mode, 3.4 MHz High speed mode, 5 MHz ultra-fast mode .
I2C Interface and protocol Two wires: SCL (serial clock) and SDA (serial data). Both need to be pulled up with a resistor to +Vdd. Transfers of 8 bits or bytes. Each I2C slave device has a 7-bit address 10-bit address as allowed by the specification.
I2C protocol normal state SCL and SDA are high. master generates Start (S) followed by the address of the slave device (B1) If the bit 0 = 0, write otherwise read Once all bytes are read or written (Bn) the master device generates Stop (P).
I2C specification Serial data transfer wired AND (open collector) For each clock pulse one bit of data is transferred. The SDA signal can only change when the SCL signal is low when the clock is high the data should be stable.
I2C data transfer Data on the I2C bus is transferred in 8-bit packets. There is no limitation on the number of bytes. Master generates clock pulses.
Arbitration If more than one master, they must arbitrate Arbitration is performed on the SDA signal while the SCL signal is high. Each master checks if the SDA signal on the bus corresponds to the generated SDA signal. If the SDA signal on the bus is low but it should be high, then this master has lost arbitration. It goes into slave mode.
