Understanding Make Utility and Makefile in Software Engineering
Exploring the concepts of make utility and makefile, this introduction covers their definitions, benefits, installation requirements, basic structure, and practical applications. Make is a powerful tool for automating build processes, managing dependencies, and facilitating efficient software development workflows.
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A Simple Introduction to Make Utility CS330E Elements of Software Engineering I Dr. Fares Fraij
On-line resources Makefile manual: https://www.gnu.org/software/make/manual/make.html Makefile Quick Reference: https://www.gnu.org/software/make/manual/html_node/Quick- Reference.html
Outline What is make utility and makefile? What are the benefits of make utility? Do I need to install make utility? What is the basic structure of a makefile? How does make utility work (use cases)? In class practice
What is make utility and makefile? make Utility: A build automation tool used primarily for compiling and linking code. It automates the process of building and managing dependencies in software projects. Makefile: A special file used by make to define rules and instructions for the build process. It specifies how to derive the target files from source files and the commands to execute. Purpose: Automate repetitive tasks, manage dependencies, and handle incremental builds efficiently.
What are the benefits of make utility? Automation: Reduces manual effort by automating the build and management process. Dependency Management: Automatically handles dependencies between files, ensuring that only updated parts are rebuilt. Incremental Builds: Optimizes the build process by rebuilding only those parts of the project that have changed. Flexibility: Can be used for a variety of tasks beyond just compilation, including testing, deployment, and documentation.
Do I need to install make utility? Pre-installed: On many Unix-like systems (e.g., Linux, macOS), make is often pre-installed. Installation: If make is not installed, it can be added using the following methods: Linux: Install using package managers, e.g., sudo apt-get install make (Debian/Ubuntu) or sudo yum install make (CentOS/RHEL). macOS: Use Homebrew to install, e.g., brew install make. Windows: see instructions on class webpage > start here .
What is the basic structure of a makefile? Target: The file or action to be created or executed. Dependencies: Files or targets that the target depends on. Commands: Shell commands executed to build the target from the dependencies. Example Makefile Structure: target: dependency1 dependency2 command1 command2
How does make work (use case)? A Makefile is composed of rules structured as follows: target: dependencies action Executing a Rule: $ make target Use Cases: No Dependencies: Directly executes the action for the target. With Dependencies: Executes the action for the target after resolving and executing all dependencies.
No Dependencies A makefile may consist of rules. A rule is structured as follows. target: dependencies action If target does not exist, the action is executed; otherwise, it is skipped.
With Dependencies A makefile may consist of rules. A rule is structured as follows. target: dependencies action With Dependencies: If the target is missing or any dependency is updated, the action will be executed; otherwise, it will be skipped.
Makefile Rules: Order of Execution 3. Execution Order: 1. Default Target Execution: o Direct Dependencies: make executes the rules for direct dependencies of the target in the order they are listed. o When make is run without specifying a target, it executes the first target listed in the Makefile. o Nested Dependencies: For each dependency, make recursively resolves and executes its dependencies before executing the rule itself. 2. Dependency Resolution: o For a specified target, make first resolves its dependencies. If a target depends on other targets, make will recursively process those dependencies first. 4. Action Execution: o After resolving all dependencies for a target, make executes the actions associated with that target. o Dependencies are resolved in the order they appear in the Makefile but are processed based on their own dependency rules.
Makefile Rules: Order of Execution # Example: Makefile Rules target1: dep1 dep2 @echo "Building target1" Running make target1 would follow this order: Resolve dep1 : Executes the rule for dep1 . Resolve dep2 : Executes the rule for dep2 , which also involves resolving dep3 . Resolve dep3 : Executes the rule for dep3 . Execute dep2 : After dep3 is built. Execute target1 : After dep1 and dep2 are built. dep1: @echo "Building dep1" dep2: dep3 @echo "Building dep2" dep3: @echo "Building dep3"
References https://www.gnu.org/software/make/manual/make.html#Basics https://opensource.com/article/18/8/what-how-makefile
