Introduction to Make Utility and Makefile in Software Engineering

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Make utility is an automation tool for efficient program running and compiling. It requires a Makefile to define tasks. Benefits include aliasing commands, efficient compilation of changed files, and ease of operation. Installation may vary per system. Makefiles consist of rules with specific structures. Understanding Make utility is essential for effective software development.

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A Simple Introduction to Make Utility CS330E Elements of Software Engineering I Dr. Fares Fraij

On-line resources Makefile manual: https://www.gnu.org/software/make/manual/make.html Makefile Quick Reference: https://www.gnu.org/software/make/manual/html_node/Quick- Reference.html

Outline What is make utility and makefile? What are the benefits of make utility? Do I need to install make utility? What is the basic structure of a makefile? How does make utility work (use cases)? In class practice

What is make utility and makefile? Make utility is an automation tool for running and compiling your programs efficiently. Specifically, it s a handy tool if you want to run or update a task when certain files are updated. The make utility requires a file, Makefile (or makefile), which defines set of tasks to be executed. make reads the makefile in the current directory

What are the benefits of make utility? make utility also helps in aliasing commands that span over multilines. You group the commands under a target and keep calling the target to refer to the group of commands. If you have hundred files that you need to compile together to create a program, you may not want to type in a thousand file name in the command line. You also do not want to retype the file names each time you change the source files. We need to recompile and link the files that have only been changed.

Do I need to install make utility? On UTCS machines and Mac OS, make utility is probably installed. On Windows machines, you need to installed MinGW (for MinGW installation instructions, read start here tab on the class webpage). Note: "make" program is a building tool which runs on Unix and Linux. MinGW is a compiler system based on GNU (free UNIX- style OD) GCC that compiles and links code to be run on Windows.

What is the basic structure of a makefile? A makefile may consist of rules. A rule is structured as follows. target: dependencies action makefiles are whitespace sensitive. target is all the way to the left action has a tab right before it

How does make work (use case)? A makefile may consist of rules. A rule is structured as follows. target: dependencies action Use case for executing the command $ make target is as follows: (you must run the command in the shell within the folder where the makefile is stored) : When there are NO dependencies When there are dependencies

How does make work (use case)? A makefile may consist of rules. A rule is structured as follows. target: dependencies action Use case for executing the command make target is as follows: (you must run the command in the shell within the folder where the makefile is stored) : When there are NO dependencies: If the target does not exists in the current folder, then the command will result in running the corresponding action(s); otherwise, the action(s) won t be executed.

How does make work (use case)? A makefile may consist of rules. A rule is structured as follows. target: dependencies action Use case for executing the command make target is as follows: (you must run the command in the shell within the folder where the makefile is stored) : When there are dependencies: If the target does not exists in the current folder or one of the dependencies is updated recently, then the command will result in running corresponding action(s); otherwise, the action(s) won t be executed.

How does make work (use case)? A makefile may consist of rules. A rule is structured as follows. target: dependencies action Use case for running the command make , i.e., without specifying a target: Generally, the first target in the makefile (from top to button) will be considered.

In class practice Task: We are going to create a simple makefile Before you start

In class practice Before you start Create a folder on my Desktop, for example, call it cs330e. Choose a text editor, NotePad++ for Windows or VIM for Mac. Decide on a command-line interpreter, Git Bash that comes with Git for Windows or Terminal for Mac. For Windows machines, o Create a shortcut for bash on your desktop. On my machine, bash exists at C:\Program Files\Git\bin , navigate to that folder and right click on bash > send to > Desktop. o set bash to open in your working folder, cs330e. Right click on bash > properties > in start in: , replace the existing path with the path to your cs330e folder. Get a Unix basic commands cheat sheet.

In class practice Task: We are going to create a simple makefile On your machine, create a Python file Avg.py that contains the following. def avg(marks): assert len(marks) != 0 return sum(marks)/len(marks) print("The average of 1, 2, and 3 is", avg([1,2,3])) In your shell, type in the following command. $ python Avg.py The average of 1, 2, and 3 is 2.0

In class practice On your machine, create a Python file Avg.py that contains the following. def avg(marks): assert len(marks) != 0 return sum(marks)/len(marks) print("The average of 1, 2, and 3 is", avg([1,2,3])) To redirect the standard output stream to the file Output.txt , we use the operator > (it will not be visible in the terminal) $ python Avg.py > Output.txt To list the contents of the file Output.txt $ cat Output.txt The average of 1, 2, and 3 is 2.0 Remove Output.txt $ rm Output.txt

Aliasing a command using a makefile Now, we are going to alias the command python Avg.py > Output.txt using a makefile. In the same folder where Avg.py is, create a makefile that has the following. Output.txt: @echo "Creating Output.txt" python Avg.py > Output.txt Note:You need to save the file as makefile with no extension. To do that in notepad++ , you choose All types (*.*) from the Save as type: menu.

Aliasing a command using a makefile Now, we are going to alias the command python Avg.py > Output.txt using a makefile. In the same folder where Avg.py is, create a makefile that has the following. Output.txt: @echo Creating Output.txt" python Avg.py > Output.txt In your shell, run the command make Output.txt . $ make Output.txt creating Output.txt python Avg.py > Output.txt

Aliasing a command using a makefile To make sure that Output.txt was created and has the expected output, run the following command in your shell. $ cat Output.txt The average of 1, 2, and 3 is 2.0 Open Avg.py and add anything such as a comment and save. When you re-run make Output.txt . $ make Output.txt make.exe": ` Output.txt ' is up to date. Make interprets the rule to mean "execute Output.txt target to create the file named Output.txt ". Since the Output.txt is already there, and its dependencies didn't change (in our case there are no dependencies), nothing will be done.

Aliasing a command using a makefile To instruct make to execute a certain action even when the corresponding target already exists and its corresponding dependencies didn't change, we include that target in a .PHONY target. Our makefile will look as follows. .PHONY: Output.txt Output.txt: @echo "creating Output.txt" python Avg.py > Output.txt

Aliasing a command using a makefile Now, when executing make Output.txt , the action will be executed. $ make Output.txt creating Output.txt python Avg.py > Output.txt

Aliasing a command using a makefile It s not necessary for the target to be a filename, it might be just a name for the recipe. Update the makefile by adding two more targets. .PHONY: Output.txt Output.txt: @echo "creating Output.txt" create: clean: python Avg.py > Output.txt @echo "creating newfile.txt" touch newfile.txt @echo "deleteing Output.txt and newfile.txt" rm Output.txt rm newfile.txt

Aliasing a command using a makefile Now, you can make any of these targets. For example, you can run make on each target as follows. $ make Output.txt $ make create $ make clean But what will happen if you run the make command without specifying any target? $ make

Aliasing a command using a makefile Output.txt target will only be executed because it is the first target in the makefile. This target is called the default target (or default goal). You can manually specify your default goal by placing the following at the beginning of the makefile. .DEFAULT_GOAL := create

Aliasing a command using a makefile If you have more than one file to be considered as the default goal, you can place a target at the beginning of the makefile and specify these files as dependencies. all: Output.txt create Now, if you type in make , the targets Output.txt and create will be executed. Type in make clean to delete the files Output.txt and newfile.txt .

Updating dependencies triggers actions Now, we re going to use Avg.py . Let s delete the contents of the previous makefile and only add the following rule. Output.txt: Avg.py python Avg.py > Output.txt cat output.txt What is the maindifference between this new Output.txt rule and the old one? Output.txt: @echo "creating Output.txt" python Avg.py > Output.txt

Updating dependencies triggers actions In your shell, type in the following commands. $ make Output.txt python Avg.py > Output.txt $ cat output.txt The average of 1, 2, and 3 is 2.0 Re-type the same command. $ make Output.txt make.exe": `Output.txt' is up to date.

Updating dependencies triggers actions Open Avg.py and change something for example by adding a comment and then save. $ make Output.txt python Avg.py > Output.txt cat output.txt The average of 1, 2, and 3 is 2.0 Changing the dependency file caused make to re-execute the actions.