Principles of I/O Hardware Overview by Ali Akbar Mohammadi
This collection of images and text outlines the fundamental principles of Input/Output (I/O) hardware, covering topics such as block and character devices, device drivers, data rates, device controllers, CPU connectivity, I/O channels, and the concept of checksums. Ali Akbar Mohammadi provides insights into the components, functions, and connections involved in I/O hardware systems.
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Principles of I/O Hardware Principles of I/O Hardware Ali Akbar Mohammadi 1
I/O Devices I/O Devices Block devices: Stores information in fixed-size blocks, each one with its own address. The essential property of a block device is that it is possible to read or write each block independently of all the other ones. Disk Character devices: A character device delivers or accepts a stream of characters, without regard to any block structure. It is not addressable and does not have any seek operation. Printer Exception: Clock Ali Akbar Mohammadi 2
Device Driver Device Driver The file system deals only with abstract block devices and leaves the device-dependent part to lower-level software called device drivers. Ali Akbar Mohammadi 3
Some Typical Device, Some Typical Device, Network, and Bus Network, and Bus Data Rates. Data Rates. Ali Akbar Mohammadi 4
Device Controllers Device Controllers I/O units typically consist of a mechanical component and an electronic component. It is often possible to separate the two portions to provide a more modular and general design. The electronic component is called the device controller or adapter. On personal computers, it often takes the form of a printed circuit card that can be inserted into an expansion slot. The mechanical component is the device itself. Ali Akbar Mohammadi 5
Model for Connecting the CPU, Memory, Model for Connecting the CPU, Memory, Controllers, and I/O Devices Controllers, and I/O Devices Ali Akbar Mohammadi 6
I/O Channels I/O Channels Most personal computers and servers use the bus model of above picture for communication between the CPU and the controllers. Large mainframes often use a different model, with specialized I/O computers called I/O channels taking some of the load off the main CPU. Ali Akbar Mohammadi 7
Checksum Checksum A checksum is a small-sized datum from a block of digital data for the purpose of detecting errors which may have been introduced during its transmission or storage. Ali Akbar Mohammadi 8
Controller's Job Controller's Job convert the serial bit stream into a block of bytes and perform any error correction necessary. The block of bytes is typically first assembled, bit by bit, in a buffer inside the controller. After its checksum has been verified and the block declared to be free of errors, it can then be copied to main memory. Ali Akbar Mohammadi 10
Error Correction Code (ECC) Error Correction Code (ECC) Error correction code (ECC) checks read or transmitted data for errors and corrects them as soon as they are found. 1. When a data byte or word is stored in RAM or peripheral storage, a code- specifying bit sequence is estimated and stored. Each fixed number of bits per word has an additional fixed number of bits to store this code. 2. When the byte or word is called for reading, a code for the retrieved word is calculated according to the original algorithm and then compared to the stored byte s extra fixed bits. 3. If the codes match, the data is error free and is forwarded for processing. 4. If the codes do not match, the changed bits are caught through a mathematical algorithm and the bits are immediately corrected. Ali Akbar Mohammadi 11
Memory Memory- -Mapped I/O Mapped I/O Each controller has a few registers that are used for communicating with the CPU. By writing into these registers, the operating system can command the device to deliver data, accept data, switch itself on or off, or otherwise perform some action. By reading from these registers, the operating system can learn what the device's state is, whether it is prepared to accept a new command, and so on. Ali Akbar Mohammadi 12
(a) Separate I/O and memory space (a) Separate I/O and memory space (b) Memory (b) Memory- -mapped I/O mapped I/O (c) Hybrid (c) Hybrid Ali Akbar Mohammadi 13
Interrupts Interrupts A CPU can execute a loop, testing a status bit each time until a device is ready to accept or provide new data. This is called polling or busy waiting. Ali Akbar Mohammadi 14
Plug 'n Play Plug 'n Play In computing, a plug n play device or computer bus, is one with a specification that facilitates the discovery of a hardware component in a system without the need for physical device configuration or user intervention in resolving resource conflicts. Ali Akbar Mohammadi 15
Direct Memory Access (DMA) Direct Memory Access (DMA) Direct memory access (DMA) is a feature of computer systems that allows certain hardware subsystems to access main system memory (RAM) independently of the central processing unit (CPU). Ali Akbar Mohammadi 16
Operation of a DMA Transfer Operation of a DMA Transfer Ali Akbar Mohammadi 17
