Understanding Registers in Digital System Design
Registers play a vital role in digital systems by storing multi-bit binary data and facilitating various operations. They are essential for designing counters, accumulators, and circuits. Designing circuits with registers involves a divide and conquer approach, separating datapath and control unit components. By understanding the functions and applications of registers, one can efficiently implement complex digital systems.
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ECE 352 Digital System Fundamentals Registers Registers 1 1
Register A register contains a set of contextually-related flip-flops Registers are often used to store a multi-bit binary word; each flip- flop in the register stores a single bit of the word Register operations are performed on the FFs as a group All bits within a register have a common clock If the register has an asynchronous reset, all flip-flops in the register are affected by this signal (some may preset, others may clear it depends on the desired initial register value ) Registers D3 D2 D1 D0 D Q D Q D Q D Q EN EN EN EN CLR CLR CLR CLR EN CLK CLR Q3 Q2 Q1 Q0 2 2
Why Use Registers? How would you design a 64-bit up/down counter? Draw a state diagram with 264states? 264= 18,446,744,073,709,551,616 (!) Thinking about the individual states of the counter isn t useful! Instead, think of a 64-bit value stored in a register Connect a 64-bit incrementer/decrementer to produce the next value to be stored in the register Use the up/down signal to control the incrementer/decrementer Registers 3 3
Why Use Registers? How about a 64-bit accumulator An accumulator is a type of register that (when enabled) adds its current input value to a stored sum, accumulating the inputs IN Registers How can we easily build an accumulator? Build a 64-bit register Build a 64-bit adder Connect them! 64 64 64 64 Adder Adder 64 64 64 64 EN CLK RST RST RST EN CLK CLK EN EN EN EN Register Register Register CLR CLR CLR 64 64 64 4 4
Designing Circuits with Registers Often use divide and conquer design approach Datapath: the part of the system (circuitry and registers) that processes and stores the data Control unit: the part of the system that tells the datapath how and when to process and store the data Registers Can design the datapath separately from the control unit after defining their interface Status signals: register outputs that provide information to the controller Control signals: register inputs that allow the control unit to tell the registers what to do (like ALU mode bits) In fact, designing a register is nearly identical to designing an ALU that has a flip-flop attached to each of its output bits 5 5
Types of Registers Storage registers Registers that store data that is operated on by other circuits, and often have only load capability RISC (reduced instruction set computer) machines commonly use storage registers with a shared ALU Registers Operational registers Registers with dedicated logic that performs operations on its stored data (and other inputs) CISC (complex instruction set computer) machines commonly use operational registers to support execution of complex instructions 6 6
Register Symbol Examples 64-bit register R with shift and load capabilities 64 SHIFT IN LOAD CLK CLRN ODD ZERO R OUT Registers 64 8-bit register Y that can perform various operations on itself and/or its data inputs A and B 8 8 OP1 A B VALID ZERO NEG OP0 RST Y CLK 8 7 7
Register Example #1: Outputs 64-bit register R with shift and load capabilities Status output(s). These are flags that indicate something specific about the register s value. Registers 64 SHIFT IN LOAD CLK CLRN ODD ZERO R OUT 64 Data output. This is the register s value (contents). It may not always be explicitly labeled if the register name is given, or it may be labeled with the register name. 8 8
Register Example #1: Inputs 64-bit register R with shift and load capabilities Data input. Generally matches the width (size) of the register. Control inputs synchronously tell the register what to do. These values are usually outputs of an FSM Registers For this register, all bits of IN are (synchronously!) simultaneously loaded into the register when input LOAD=1 (also called a parallel load ) 64 SHIFT IN LOAD CLK CLRN ODD ZERO R OUT 64 Clock and asynchronous active- low clear inputs. These signals are global inputs for the circuit, not generated by an FSM! 9 9
Register Example #1: Other Info 64-bit register R with shift and load capabilities Name of the register. This is not always given separately if the data output is labeled with the register name Registers 64 SHIFT IN LOAD CLK CLRN ODD ZERO R OUT 64 Indicates that it is a 64-bit register (a slash and a bitwidth is how we indicate a bus in a drawing) 10 10
Register Example #2 8-bit register Y that can perform various operations on itself and/or its data inputs A and B Two data inputs, A and B Control inputs Registers 8 8 OP1 A B VALID ZERO NEG OP0 RST Y CLK 8 Status/flag outputs 8-bit register data output, labeled with the register name 11 11
Register Labeling Caveats Although we tend to draw inputs on the left and top and outputs on the right and bottom, that is not always the case! Each register with capabilities other than load must have a specification, which includes: Size (i.e., number of bits) Data input ports (if any) Control input ports (if any) Status/flag outputs (if any) Data output (if there is one) Operations it can perform Registers 12 12
ECE 352 Digital System Fundamentals Registers Registers 13 13