8086 Microprocessor Addressing Modes and Instruction Set

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Learn about addressing modes in 8086 microprocessor, which define the ways to denote source operands in instructions. Explore various groups of addressing modes like Register Addressing, Immediate Addressing, Direct Addressing, Register Indirect Addressing, Based Addressing, String Addressing, and more.

  • 8086 Microprocessor
  • Addressing Modes
  • Instruction Set
  • Computer Science
  • Assembly Language
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  1. UNIT-II ADDRESSING MODES & Instruction set

  2. 8086 Microprocessor Introduction Program A set of instructions written to solve a problem. Instruction Directions which a microprocessor follows to execute a task or part of a task. Computer language High Level Low Level Machine Language Assembly Language Binary bits English Alphabets Mnemonics Assembler Mnemonics Machine Language 2

  3. ADDRESSING MODES

  4. 8086 Microprocessor Addressing Modes The different ways in which a source operand is denoted in an instruction are known as addressing modes. Every instruction of a program has to operate on a data. 1. Register Addressing Group I : Addressing modes for register and immediate data 2. Immediate Addressing 3. Direct Addressing 4. Register Indirect Addressing 5. Based Addressing Group II : Addressing modes for memory data 6. Indexed Addressing 7. Based Index Addressing 8. String Addressing 9. Direct I/O port Addressing Group III : Addressing modes for I/O ports 10. Indirect I/O port Addressing 11. Relative Addressing Group IV : Relative Addressing mode 12. Implied Addressing Group V : Implied Addressing mode 5

  5. 8086 Microprocessor Group I : Addressing modes for register and immediate data Addressing Modes register which holds the data to be operated by the instruction. The instruction will specify the name of the 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing Example: 4. Register Indirect Addressing MOV CL, DH 5. Based Addressing The content of 8-bit register DH is moved to another 8-bit register CL 6. Indexed Addressing (CL) (DH) 7. Based Index Addressing 8. String Addressing 9. Direct I/O port Addressing 10. Indirect I/O port Addressing 11. Relative Addressing 12. Implied Addressing 6

  6. 8086 Microprocessor Group I : Addressing modes for register and immediate data Addressing Modes In immediate addressing mode, an 8-bit or 16-bit data is specified as part of the instruction 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing Example: 4. Register Indirect Addressing MOV DL, 08H 5. Based Addressing The 8-bit data (08H) given in the instruction is moved to DL 6. Indexed Addressing (DL) 08H 7. Based Index Addressing 8. String Addressing MOV AX, 0A9FH 9. Direct I/O port Addressing The 16-bit data (0A9FH) given in the instruction is moved to AX register 10. Indirect I/O port Addressing 11. Relative Addressing (AX) 0A9FH 12. Implied Addressing 7

  7. 8086 Microprocessor Addressing Modes : Memory Access 20 Address lines 8086 can address up to 220 = 1M bytes of memory However, the largest register is only 16 bits Physical Address will have to be calculated Physical Address : Actual address of a byte in memory. i.e. the value which goes out onto the address bus. Memory Address represented in the form Seg : Offset (Eg - 89AB:F012) Each time the processor wants to access memory, it takes the contents of a segment register, shifts it one hexadecimal place to the left (same as multiplying by 1610), then add the required offset to form the 20- bit address 16 bytes of contiguous memory 89AB : F012 89AB F012 89AB0 (Paragraph to byte 0F012 (Offset is already in byte unit) + ------- 98AC2 (The absolute address) 89AB x 10 = 89AB0) 9

  8. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes 1. Register Addressing 2. Immediate Addressing Here, the effective address of the memory location at which the data operand is stored is given in the instruction. 3. Direct Addressing 4. Register Indirect Addressing The effective address is just a 16-bit number written directly in the instruction. 5. Based Addressing 6. Indexed Addressing Example: 7. Based Index Addressing MOV BX, [1354H] MOV BL, [0400H] 8. String Addressing 9. Direct I/O port Addressing The square brackets around the 1354H denotes the contents of the memory location. When executed, this instruction will copy the contents of the memory location into BX register. 10. Indirect I/O port Addressing 11. Relative Addressing This addressing mode is called direct because the displacement of the operand from the segment base is specified directly in the instruction. 12. Implied Addressing 11

  9. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes register which holds the effective address (EA) will be specified in the instruction. In Register indirect addressing, name of the 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing Registers used to hold EA are any of the following registers: 4. Register Indirect Addressing BX, BP, DI and SI. 5. Based Addressing Content of the DS register is used for base address calculation. 6. Indexed Addressing 7. Based Index Addressing Example: 8. String Addressing Note enclosed in brackets refer to content of register/ memory : Register/ memory MOV CX, [BX] 9. Direct I/O port Addressing Operations: 10. Indirect I/O port Addressing EA = (BX) BA = (DS) x 1610 MA = BA + EA 11. Relative Addressing 12. Implied Addressing (CX) (MA) or, (CL) (CH) (MA) (MA +1) 12

  10. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes base value for effective address and a signed 8-bit or unsigned 16-bit displacement will be specified in the instruction. In Based Addressing, BX or BP is used to hold the 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing In case of 8-bit displacement, it is sign extended to 16-bit before adding to the base value. 4. Register Indirect Addressing 5. Based Addressing(Relative) When BX holds the base value of EA, 20-bit physical address is calculated from BX and DS. 6. Indexed Addressing When BP holds the base value of EA, BP and SS is used. 7. Based Index Addressing 8. String Addressing Example: 9. Direct I/O port Addressing MOV AX, [BX + 08H] 10. Indirect I/O port Addressing Operations: 11. Relative Addressing 0008H EA = (BX) + 0008H BA = (DS) x 1610 MA = BA + EA 08H (Sign extended) 12. Implied Addressing (AX) (MA) or, (AL) (AH) (MA) (MA + 1) 13

  11. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes memory data and a signed 8-bit or unsigned 16- bit displacement instruction. SI or DI register is used to hold an index value for 1. Register Addressing will be specified in the 2. Immediate Addressing 3. Direct Addressing Displacement is added to the index value in SI or DI register to obtain the EA. 4. Register Indirect Addressing 5. Based Addressing In case of 8-bit displacement, it is sign extended to 16-bit before adding to the base value. 6. Indexed Addressing 7. Based Index Addressing Example: 8. String Addressing MOV CX, [SI + 0A2H] 9. Direct I/O port Addressing Operations: 10. Indirect I/O port Addressing FFA2H A2H (Sign extended) 11. Relative Addressing EA = (SI) + FFA2H BA = (DS) x 1610 MA = BA + EA 12. Implied Addressing (CX) (MA) or, (CL) (CH) (MA) (MA + 1) 14

  12. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes is computed from the sum of a base register (BX or BP), an index register (SI or DI) and a displacement. In Based Index Addressing, the effective address 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing Example: 4. Register Indirect Addressing MOV DX, [BX + SI + 0AH] 5. Based Addressing Operations: 6. Indexed Addressing 000AH 0AH (Sign extended) 7. Based Index Addressing(R) EA = (BX) + (SI) + 000AH BA = (DS) x 1610 MA = BA + EA 8. String Addressing 9. Direct I/O port Addressing (DX) (MA) or, 10. Indirect I/O port Addressing 11. Relative Addressing (DL) (DH) (MA) (MA + 1) 12. Implied Addressing 15

  13. 8086 Microprocessor Group II : Addressing modes for memory data Addressing Modes data. Employed in string operations to operate on string 1. Register Addressing 2. Immediate Addressing The effective address (EA) of source data is stored in SI register and the EA of destination is stored in DI register. 3. Direct Addressing 4. Register Indirect Addressing Segment register for calculating base address of source data is DS and that of the destination data is ES 5. Based Addressing 6. Indexed Addressing 7. Based Index Addressing Example: MOVS BYTE 8. String Addressing Operations: 9. Direct I/O port Addressing Calculation of source memory location: EA = (SI) BA = (DS) x 1610 MA = BA + EA 10. Indirect I/O port Addressing 11. Relative Addressing Calculation of destination memory location: EAE= (DI) BAE= (ES) x 1610 MAE= BAE+ EAE 12. Implied Addressing (MAE) (MA) Note : Effective address of the Extra segment register If DF = 1, then (SI) If DF = 0, then (SI) (SI) 1 and (DI) = (DI) - 1 (SI) +1 and (DI) = (DI) + 1 16

  14. 8086 Microprocessor Group III : Addressing modes for I/O ports Addressing Modes from standard I/O mapped devices or ports. These addressing modes are used to access data 1. Register Addressing 2. Immediate Addressing In direct port addressing mode, an 8-bit port address is directly specified in the instruction. 3. Direct Addressing 4. Register Indirect Addressing Example: IN AL, [09H] 5. Based Addressing Operations: PORTaddr= 09H (AL) (PORT) 6. Indexed Addressing Content of port with address 09His moved to AL register 7. Based Index Addressing 8. String Addressing In indirect port addressing mode, the instruction will specify the name of the register which holds the port address. In 8086, the 16-bit port address is stored in the DX register. 9. Direct I/O port Addressing 10. Indirect I/O port Addressing 11. Relative Addressing Example: OUT [DX], AX 12. Implied Addressing Operations: PORTaddr= (DX) (PORT) (AX) Content of AX is moved to port whose address register. is specified by DX 17

  15. 8086 Microprocessor Group IV : Relative Addressing mode Addressing Modes 1. Register Addressing 2. Immediate Addressing In this addressing mode, the effective address of a program instruction is specified relative to Instruction Pointer (IP) by an 8-bit signed displacement. 3. Direct Addressing 4. Register Indirect Addressing 5. Based Addressing Example: JZ 0AH 6. Indexed Addressing Operations: 7. Based Index Addressing 000AH 0AH (sign extend) 8. String Addressing If ZF = 1, then 9. Direct I/O port Addressing EA = (IP) + 000AH BA = (CS) x 1610 MA = BA + EA 10. Indirect I/O port Addressing 11. Relative Addressing 12. Implied Addressing If ZF = 1, then the program control jumps to new address calculated above. If ZF = 0, then next instruction of the program is executed. 18

  16. 8086 Microprocessor Group IV : Implied Addressing mode Addressing Modes 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing 4. Register Indirect Addressing 5. Based Addressing 6. Indexed Addressing Instructions using this mode have no operands. The instruction itself will specify the data to be operated by the instruction. 7. Based Index Addressing 8. String Addressing Example: CLC 9. Direct I/O port Addressing This clears the carry flag to zero. 10. Indirect I/O port Addressing 11. Relative Addressing 12. Implied Addressing 19

  17. INSTRUCTION SET

  18. 8086 Microprocessor Instruction Set 8086 supports 6 types of instructions. 1. Data Transfer Instructions 2. Arithmetic Instructions 3. Logical Instructions 4. String manipulation Instructions 5. Process Control Instructions 6. Control Transfer Instructions 21

  19. 8086 Microprocessor 1. Data Transfer Instructions Instruction Set Instructions that are used to transfer data/ address in to registers, memory locations and I/O ports. Generally involve two operands: Source operand and Destination operand of the same size. Source: Register or a memory location or an immediate data Destination : Register or a memory location. The size should be a either a byte or a word. A 8-bit data can only be moved to 8-bit register/ memory and a 16-bit data can be moved to 16-bit register/ memory. 22

  20. 8086 Microprocessor 1. Data Transfer Instructions Instruction Set Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT MOV reg2/ mem, reg1/ mem (reg2) (mem) (reg2) (reg1) (reg1) (mem) MOV reg2, reg1 MOV mem, reg1 MOV reg2, mem MOV reg/ mem, data (reg) (mem) data data MOV reg, data MOV mem, data XCHG reg2/ mem, reg1 (reg2) (mem) (reg1) (reg1) XCHG reg2, reg1 XCHG mem, reg1 23

  21. 8086 Microprocessor 1. Data Transfer Instructions Instruction Set Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT PUSH reg16/ mem PUSH reg16 PUSH mem POP reg16/ mem POP reg16 POP mem 24

  22. 8086 Microprocessor 1. Data Transfer Instructions Instruction Set Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT OUT [DX], A IN A, [DX] OUT [DX], AL PORTaddr = (DX) (PORT) IN AL, [DX] PORTaddr = (DX) (AL) (PORT) (AL) OUT [DX], AX PORTaddr = (DX) (PORT) IN AX, [DX] PORTaddr = (DX) (AX) (PORT) (AX) IN A, addr8 OUT addr8, A (AL) (addr8) (addr8) (AL) IN AL, addr8 OUT addr8, AL (AX) (addr8) (addr8) (AX) IN AX, addr8 OUT addr8, AX 25

  23. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP ADD reg2/ mem, reg1/mem (reg2) (reg2) (mem) (reg1) + (reg2) (reg2) + (mem) (mem)+(reg1) ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 ADD reg/mem, data (reg) (mem) (reg)+ data (mem)+data ADD reg, data ADD mem, data ADD A, data (AL) (AX) (AL) + data8 (AX) +data16 ADD AL, data8 ADD AX, data16 26

  24. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP ADC reg2/ mem, reg1/mem (reg2) (reg2) (mem) (reg1) + (reg2)+CF (reg2) + (mem)+CF (mem)+(reg1)+CF ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 ADC reg/mem, data (reg) (mem) (reg)+ data+CF (mem)+data+CF ADC reg, data ADC mem, data ADDC A, data (AL) (AX) (AL) + data8+CF (AX) +data16+CF ADD AL, data8 ADD AX, data16 27

  25. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP SUB reg2/ mem, reg1/mem (reg2) (reg2) (mem) (reg1) - (reg2) (reg2) - (mem) (mem) - (reg1) SUB reg2, reg1 SUB reg2, mem SUB mem, reg1 SUB reg/mem, data (reg) (mem) (reg) - data (mem) - data SUB reg, data SUB mem, data SUB A, data (AL) (AX) (AL) - data8 (AX) - data16 SUB AL, data8 SUB AX, data16 28

  26. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP SBB reg2/ mem, reg1/mem (reg2) (reg2) (mem) (reg1) - (reg2) - CF (reg2) - (mem)- CF (mem) - (reg1) CF SBB reg2, reg1 SBB reg2, mem SBB mem, reg1 SBB reg/mem, data (reg) (mem) (reg) data - CF (mem) - data - CF SBB reg, data SBB mem, data SBB A, data (AL) (AX) (AL) - data8 - CF (AX) - data16 - CF SBB AL, data8 SBB AX, data16 29

  27. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP INC reg/ mem (reg8) (reg8) + 1 INC reg8 (reg16) (reg16) + 1 INC reg16 (mem) (mem) + 1 INC mem DEC reg/ mem (reg8) (reg8) - 1 DEC reg8 (reg16) (reg16) - 1 DEC reg16 (mem) (mem) - 1 DEC mem 30

  28. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP MUL reg/ mem For byte : (AX) For word : (DX)(AX) (AL) x (reg8) (AX) x (reg16) MUL reg For byte : (AX) For word : (DX)(AX) (AL) x (mem8) (AX) x (mem16) MUL mem IMUL reg/ mem For byte : (AX) For word : (DX)(AX) (AL) x (reg8) (AX) x (reg16) IMUL reg For byte : (AX) For word : (DX)(AX) (AX) x (mem8) (AX) x (mem16) IMUL mem 31

  29. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP DIV reg/ mem DIV reg For 16-bit :- 8-bit : (AL) (AX) :- (reg8) Quotient (AH) (AX) MOD(reg8) Remainder For 32-bit :- 16-bit : (AX) (DX)(AX) :- (reg16) Quotient (DX) (DX)(AX) MOD(reg16) Remainder DIV mem For 16-bit :- 8-bit : (AL) (AX) :- (mem8) Quotient (AH) (AX) MOD(mem8) Remainder For 32-bit :- 16-bit : (AX) (DX)(AX) :- (mem16) Quotient (DX) (DX)(AX) MOD(mem16) Remainder 32

  30. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP IDIV reg/ mem IDIV reg For 16-bit :- 8-bit : (AL) (AX) :- (reg8) Quotient (AH) (AX) MOD(reg8) Remainder For 32-bit :- 16-bit : (AX) (DX)(AX) :- (reg16) Quotient (DX) (DX)(AX) MOD(reg16) Remainder IDIV mem For 16-bit :- 8-bit : (AL) (AX) :- (mem8) Quotient (AH) (AX) MOD(mem8) Remainder For 32-bit :- 16-bit : (AX) (DX)(AX) :- (mem16) Quotient (DX) (DX)(AX) MOD(mem16) Remainder 33

  31. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP CMP reg2/mem, reg1/ mem Modify flags (reg2) (reg1) CMP reg2, reg1 If (reg2) > (reg1) then CF=0, ZF=0, SF=0 If (reg2) < (reg1) then CF=1, ZF=0, SF=1 If (reg2) = (reg1) then CF=0, ZF=1, SF=0 Modify flags (reg2) (mem) CMP reg2, mem If (reg2) > (mem) then CF=0, ZF=0, SF=0 If (reg2) < (mem) then CF=1, ZF=0, SF=1 If (reg2) = (mem) then CF=0, ZF=1, SF=0 Modify flags (mem) (reg1) CMP mem, reg1 If (mem) > (reg1) then CF=0, ZF=0, SF=0 If (mem) < (reg1) then CF=1, ZF=0, SF=1 If (mem) = (reg1) then CF=0, ZF=1, SF=0 34

  32. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP CMP reg/mem, data Modify flags (reg) (data) CMP reg, data If (reg) > data then CF=0, ZF=0, SF=0 If (reg) < data then CF=1, ZF=0, SF=1 If (reg) = data then CF=0, ZF=1, SF=0 Modify flags (mem) (mem) CMP mem, data If (mem) > data then CF=0, ZF=0, SF=0 If (mem) < data then CF=1, ZF=0, SF=1 If (mem) = data then CF=0, ZF=1, SF=0 35

  33. 8086 Microprocessor 2. Arithmetic Instructions Instruction Set Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP CMP A, data Modify flags (AL) data8 CMP AL, data8 If (AL) > data8 then CF=0, ZF=0, SF=0 If (AL) < data8 then CF=1, ZF=0, SF=1 If (AL) = data8 then CF=0, ZF=1, SF=0 Modify flags (AX) data16 CMP AX, data16 If (AX) > data16 then CF=0, ZF=0, SF=0 If (mem) < data16 then CF=1, ZF=0, SF=1 If (mem) = data16 then CF=0, ZF=1, SF=0 36

  34. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 37

  35. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 38

  36. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 39

  37. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 40

  38. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 41

  39. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 42

  40. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 43

  41. 8086 Microprocessor 3. Logical Instructions Instruction Set Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL 44

  42. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set String : Sequence of bytes or words 8086 instruction set includes instruction for string movement, comparison, scan, load and store. REP instruction prefix : used to repeat execution of string instructions String instructions end with S or SB or SW. S represents string, SB string byte and SW string word. Offset or effective address of the source operand is stored in SI register and that of the destination operand is stored in DI register. Depending on the status of DF, SI and DI registers are automatically updated. DF = 0 SI and DI are incremented by 1 for byte and 2 for word. DF = 1 SI and DI are decremented by 1 for byte and 2 for word. 45

  43. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS MOVS MOVSB MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) (MAE) (MA) If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 1; (SI) (DI) - 1; (SI) (SI) + 1 (SI) - 1 MOVSW MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) (MAE ; MAE + 1) (MA; MA + 1) If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 2; (SI) (DI) - 2; (SI) (SI) + 2 (SI) - 2 46

  44. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS Compare two string byte or string word CMPS CMPSB MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) Modify flags (MA) - (MAE) If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0 If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1 If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0 CMPSW For byte operation If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 1; (SI) (DI) - 1; (SI) (SI) + 1 (SI) - 1 For word operation If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 2; (SI) (DI) - 2; (SI) (SI) + 2 (SI) - 2 47

  45. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS Scan (compare) a string byte or word with accumulator SCAS SCASB MAE = (ES) x 1610 + (DI) Modify flags (AL) - (MAE) If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0 If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1 If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0 If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 1 (DI) 1 SCASW MAE = (ES) x 1610 + (DI) Modify flags (AL) - (MAE) If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0 If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1 If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0 If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 2 (DI) 2 48

  46. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS Load string byte in to AL or string word in to AX LODS LODSB MA = (DS) x 1610 + (SI) (AL) (MA) If DF = 0, then (SI) If DF = 1, then (SI) (SI) + 1 (SI) 1 LODSW MA = (DS) x 1610 + (SI) (AX) (MA ; MA + 1) If DF = 0, then (SI) If DF = 1, then (SI) (SI) + 2 (SI) 2 49

  47. 8086 Microprocessor 4. String Manipulation Instructions Instruction Set Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS Store byte from AL or word from AX in to string STOS STOSB MAE = (ES) x 1610 + (DI) (MAE) (AL) If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 1 (DI) 1 STOSW MAE = (ES) x 1610 + (DI) (MAE ; MAE + 1 ) (AX) If DF = 0, then (DI) If DF = 1, then (DI) (DI) + 2 (DI) 2 50

  48. 8086 Microprocessor 5. Processor Control Instructions Instruction Set Mnemonics Explanation Set CF 1 STC Clear CF 0 CLC Complement carry CF CF/ CMC Set direction flag DF 1 STD Clear direction flag DF 0 CLD Set interrupt enable flag IF 1 STI Clear interrupt enable flag IF 0 CLI NOP No operation HLT Halt after interrupt is set WAIT Wait for TEST pin active ESC opcode mem/ reg Used to pass instruction to a coprocessor which shares the address and data bus with the 8086 LOCK Lock bus during next instruction 51

  49. 8086 Microprocessor 6. Control Transfer Instructions Instruction Set Transfer the control to a specific destination or target instruction Do not affect flags 8086 Unconditional transfers Mnemonics Explanation CALL reg/ mem/ disp16 Call subroutine RET Return from subroutine JMP reg/ mem/ disp8/ disp16 Unconditional jump 52

  50. 8086 Microprocessor 6. Control Transfer Instructions Instruction Set 8086 unsigned conditional branch instructions 8086 signed conditional branch instructions Checks flags If conditions are true, the program control is transferred to the new memory location in the same segment by modifying the content of IP 53

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