Physiology: The Body as an Organized Solution
Prototyping Activities and Recent Technologies Studies
PARTS.FUSED
Full-Speed Edet
Andrey Vostrukhin
Prototyping Activities and Recent Technologies Studies
PARTS.FUSED
Full-Speed EDet
“Go” or “no-go”
point for Full-Speed EDet
Technology evaluation and tests
You have to run to stay in the same place
To be up-to-date with modern developments we must evaluate recent technologies and test design options.
B
e
i
n
g
i
n
e
x
p
e
n
s
i
v
e
f
e
a
s
i
b
i
l
i
t
y
s
t
u
d
y
f
o
r
F
u
l
l
-
S
p
e
e
d
E
D
e
t
,
i
t
a
l
s
o
p
r
o
v
i
d
e
s
i
m
p
o
r
t
a
n
t
g
r
o
u
n
d
f
o
r
o
n
g
o
i
n
g
p
r
o
j
e
c
t
s
Key technologies are:
Samtec FireFly Copper and Fiber
Vacuum feedthrough for high-speed data link
High-speed data capture
High-density wirebonding with height difference
Packaged DCD
In-house PCB bumping
DCD and FPGA compatibility tests
These tasks can be effectively done in parallel with “background priority” or outsourced.
Task: evaluate high-speed data links
Fiber
Samtec FireFly Copper and Fiber
Features
10+ Gbps out-of-the-box
Dramatically improved signal integrity, compared to PCB traces
Galvanic isolation and EMI immunity for Fiber option
Direct-to-Ethernet connection for Fiber option
Advantages
Up to 30x less signal wires
Much less “my eye diagram so small, that I can’t receive data” stories
Improved reliability
Simple and clean design
Copper
Test plan
Assemble set of PCBs with different usage scenarios
Test link reliability and data integrity using existing hardware
Vacuum feedthrough for high-speed data link
Test plan:
Order standard vacuum flanges and make CNC-cuts for cables
Order Samtec cables and PCBs
Assemble flanges
Vacuum test
Assemblies aging by thermal cycling or shelf life
Repeat vacuum test
Analyze results
T
e
s
t
s
a
m
p
l
e
s
Fiber
Twinax
Twinax-PCB
Task: find best solution for vacuum feed-through
High-speed data capture
Task: test solution for 100G packet capture
Sensor dummy data generator: 16x10G
S
e
n
s
o
r
d
u
m
m
y
d
a
t
a
g
e
n
e
r
a
t
o
r
We can use lab servers or FPGA evaluation boards
1
0
0
G
n
e
t
w
o
r
k
s
w
i
t
c
h
~
1
0
K
E
Available domestically for 30 days free testing
1
0
0
G
p
a
c
k
e
t
c
a
p
t
u
r
e
d
e
v
i
c
e
~
4
0
K
E
Manufacturer is in Japan, but they offer 30 days free
testing with free FedEx shipping
Test plan:
Get all hardware together. Same time, same place
See if packet capture server performs as advertised
High-density wirebonding with height difference
Test board
FR-4 Base
Height adjustment
insert
Test board
Task: test wirebonding technology limits
Test plan:
Order test PCBs with:
bonding pads
test pads (open/short verification)
Glue PCBs together in variety of spacing and height
Perform electrical open/short test
Packaged DCD
Task: make packaged DCD that we can use for prototyping
Implementation plan:
Design and manufacture interposer PCB to carry DCD and passives
Solder DCD and passives
Interposer bumping (next slide)
DCD
0402
0402
In-house PCB bumping
Task: obtain in-house experience on PCB bumping and re-balling
Implementation plan:
Order test PCBs, fixtures, stencils and solder pastes
Find optimal parameters for bumping/re-balling
Personnel training
DCD and FPGA compatibility tests
Task: test DCD “single-ended LVDS” output compatibility with FPGAs input
Implementation plan:
Use evaluation boards before going to PCB design
Use drop-in FPGA modules or use evaluation boards as a reference design
Design and manufacture compatibility test boards for SRAM and Flash based FPGAs
Use biggest building blocks available, ie power modules instead of discrete parts and ICs, etc
Test compatibility!
Thanks for attention!
Questions?
Physiology is the science that delves into the function of living organisms, exploring the essential role of body fluids, fluid compartments, and fluid balance. It emphasizes the importance of water as a primary body fluid and the functions it serves within the body's organized system. Understanding the composition of intracellular and extracellular fluids, as well as their roles in maintaining cellular metabolism, temperature regulation, digestion, and elimination, is vital in understanding the body's intricate mechanisms.
Download Presentation
Please find below an Image/Link to download the presentation.
The content on the website is provided AS IS for your information and personal use only. It may not be sold, licensed, or shared on other websites without obtaining consent from the author.If you encounter any issues during the download, it is possible that the publisher has removed the file from their server.
You are allowed to download the files provided on this website for personal or commercial use, subject to the condition that they are used lawfully. All files are the property of their respective owners.
The content on the website is provided AS IS for your information and personal use only. It may not be sold, licensed, or shared on other websites without obtaining consent from the author.
E N D
Presentation Transcript
Prototyping Activities and Recent Technologies Studies PARTS.FUSED Full-Speed Edet Andrey Vostrukhin 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Prototyping Activities and Recent Technologies Studies PARTS.FUSED Full-Speed EDet Go or no-go point for Full-Speed EDet 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Technology evaluation and tests You have to run to stay in the same place To be up-to-date with modern developments we must evaluate recent technologies and test design options. Being inexpensive feasibility study for Full-Speed EDet, it also provides important ground for ongoing projects Key technologies are: Samtec FireFly Copper and Fiber Vacuum feedthrough for high-speed data link High-speed data capture High-density wirebonding with height difference Packaged DCD In-house PCB bumping DCD and FPGA compatibility tests These tasks can be effectively done in parallel with background priority or outsourced. 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Samtec FireFly Copper and Fiber Task: evaluate high-speed data links Copper Fiber Features Advantages 10+ Gbps out-of-the-box Up to 30x less signal wires Dramatically improved signal integrity, compared to PCB traces Much less my eye diagram so small, that I can t receive data stories Galvanic isolation and EMI immunity for Fiber option Improved reliability Direct-to-Ethernet connection for Fiber option Simple and clean design Test plan Assemble set of PCBs with different usage scenarios Test link reliability and data integrity using existing hardware 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Vacuum feedthrough for high-speed data link Task: find best solution for vacuum feed-through Test plan: Order standard vacuum flanges and make CNC-cuts for cables Order Samtec cables and PCBs Assemble flanges Vacuum test Assemblies aging by thermal cycling or shelf life Repeat vacuum test Analyze results Test samples Fiber Twinax Twinax-PCB 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
High-speed data capture Task: test solution for 100G packet capture Sensor dummy data generator Sensor dummy data generator: 16x10G We can use lab servers or FPGA evaluation boards 100G network switch ~10KE Available domestically for 30 days free testing 100G packet capture device ~40KE Manufacturer is in Japan, but they offer 30 days free testing with free FedEx shipping Test plan: Get all hardware together. Same time, same place See if packet capture server performs as advertised 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
High-density wirebonding with height difference Task: test wirebonding technology limits Test plan: Order test PCBs with: bonding pads test pads (open/short verification) Glue PCBs together in variety of spacing and height Test board Perform electrical open/short test Height adjustment insert Test board FR-4 Base 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Packaged DCD Task: make packaged DCD that we can use for prototyping Implementation plan: Design and manufacture interposer PCB to carry DCD and passives Solder DCD and passives Interposer bumping (next slide) 0402 DCD 0402 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
In-house PCB bumping Task: obtain in-house experience on PCB bumping and re-balling Implementation plan: Order test PCBs, fixtures, stencils and solder pastes Find optimal parameters for bumping/re-balling Personnel training 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
DCD and FPGA compatibility tests Task: test DCD single-ended LVDS output compatibility with FPGAs input Implementation plan: Use evaluation boards before going to PCB design Use drop-in FPGA modules or use evaluation boards as a reference design Design and manufacture compatibility test boards for SRAM and Flash based FPGAs Use biggest building blocks available, ie power modules instead of discrete parts and ICs, etc Test compatibility! 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
Thanks for attention! Questions? 26-29 May 2019 / Kloster Seeon / PXD Workshop and 23rd International Workshop on DEPFET Detectors and Applications
