Instruction Formats in Computer Architecture

Instruction
 
formats
What 
is 
instruction
 
format?
An 
instruction 
is normally 
made up 
of 
a
combination 
of an 
operation code 
and
some way of specifying an 
operand
,
most 
commonly 
by 
its 
location or 
address 
in
 
memory
Types 
of
 
address 
instructions
Three address instructions
Memory 
addresses for the 
two 
operands and
one destination need to be specified.
It 
is 
also called 
General 
register
 
organization
.
I
n
s
t
r
u
c
t
i
o
n
:
 
A
D
D
 
R
1
,
 
R
2
,
 
R
3
M
i
c
r
o
o
p
e
r
a
t
i
o
n
:
 
R
1
 
 
R
2
 
+
 
R
3
EVALUATE
 
X=(A+B)*(C+D)
X=A+(B.C)+(D.E)
Two address
 
instructions
Two 
address registers or 
two memory
locations are
 
specified
Assumes 
that the destination address is the
same 
as that of the first
 
operand
.
I
n
s
t
r
u
c
t
i
o
n
:
 
A
D
D
 
R
1
,
 
R
2
M
i
c
r
o
o
p
e
r
a
t
i
o
n
:
 
R
1
 
 
R
1
 
+
 
R
2
EVALUATE
 
X=(A+B)*(C+D)
X=A+(B.C)+(D.E)
One address
 
instructions
One address can be a register name or
memory 
address.
S
I
N
G
L
E
 
A
C
C
U
M
U
L
A
T
O
R
 
O
R
G
A
N
I
Z
A
T
I
O
N
It 
uses AC register for all
 
data
manipulation
I
n
s
t
r
u
c
t
i
o
n
:
 
A
D
D
 
X
M
i
c
r
o
o
p
e
r
a
t
i
o
n
:
 
A
C
 
A
C
 
+
 
M
[
X
]
EVALUATE
 
X=(A+B)*(C+D)
X=A+(B.C)+(D.E)
Zero address
 
instruction
Stack 
is used. 
Arithmetic 
operation pops 
two
operands from 
the stack and pushes the
result.
A
l
s
o
 
c
a
l
l
e
d
 
s
t
a
c
k
 
o
r
g
a
n
i
z
a
t
i
o
n
Zero address
 
instruction
E
v
a
l
u
a
t
e
 
X
 
=
 
(
 
A
 
+
B
 
)
 
*
 
(
 
C
 
+
D
 
)
Addressing
 
Modes
Addressing 
mode 
specifies a rule for
interpreting or 
modifying 
the 
address field
of the instruction 
before 
the operand 
is
actually
 
executed.
Well 
known addressing
 
modes-
Implied mode
Immediate mode
Register mode
Register indirect
 
mode
Autoincrement or
 
Autodecrement
D
i
r
e
c
t
 
a
d
d
r
e
s
s
 
m
o
d
e
I
n
d
i
r
e
c
t
 
a
d
d
r
e
s
s
 
m
o
d
e
R
e
l
a
t
i
v
e
 
a
d
d
r
e
s
s
 
m
o
d
e
I
n
d
e
x
e
d
 
a
d
d
r
e
s
s
i
n
g
 
m
o
d
e
Base register addressing
 
mode
Implied
 
Mode
In 
this mode 
the operands are specified
implicitly 
in the 
definition 
of the
 
instruction.
All 
register reference instructions that use an
accumulator are 
implied mode
 instruction.
Example: CMA compliment
 
accumulator.
Immediate
 
Addressing
Data 
needed 
by 
the processor is contained
in 
the
 
instruction
Operand= 
address
 
field
e.g-ADD 
5
-add 5 to the content of
 
accumulator
-5 
is 
the
 
operand
opcode
 
Operand
 
(5)
Register
 
Addressing
Operand 
is held 
in register named in address
field
A 
k-bit field can specify 
any 
one 
of 
2^k
 
registers
R
E
G
I
S
T
E
R
S
Register Indirect
 
Addressing
 
The 
selected register contains 
the 
address 
of
the 
operand 
rather than 
the 
operand
 
itself.
Mem
o
ry
50
0
Auto Increment or
 
Auto  Decrement
 
Mode
This 
is similar 
to the 
register indirect mode except
that the register is 
incremented 
or 
decremented
after or before 
its value is used 
to 
access
 
memory
.
R1=400
399
40
0
1.
 
Auto 
incr-E.A=400
R1 
is 
incremented 
to 401after the
 
execution
2. 
Auto 
decr-R1 
is 
decremented prior 
to the
execution,therefore,R1=399 and
 
E.A=399
RELATIVE ADDRESS
 
MODE
In 
this mode the content of the program
counter is 
added 
to the 
address part 
of 
the
instruction 
to 
obtain 
the effective
 
address.
2
4
MEMO
R
Y
 
            
826
                
 
+ 
Effective
 
850
Address
826+24
Indexed 
addressing
 
mode
In 
this mode the content of an index register is
added 
to 
the address part of 
the 
instruction 
to
obtain 
the effective
 
address.
opcode
 
Rb
 
Rt
 
ADDRESS(20)
index
 
register(1000)
+
 
 
1
020
E.A
10
00
2
0
Mem
o
r
y
BASE REGISTER ADDRESSING MODE
In 
this mode the content of 
a 
base register is 
added
to the 
address part of 
the 
instruction 
to 
obtain the
effective
 
address.
opcode
 
Rb
 
Rt
 
ADDRESS
REGISTER(400)
Mem
o
ry
10
0
400
+
 
   
50
0
E.A
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Explore different types of instruction formats in computer architecture, including one-address, two-address, and zero-address instructions. Learn how instructions are structured and executed, such as specifying operands and memory addresses. Dive into examples like evaluating expressions and organizing data manipulation with various addressing schemes.

  • Computer Architecture
  • Instruction Formats
  • Operand Specification
  • Memory Addresses
  • Data Manipulation

Uploaded on Dec 08, 2024 | 0 Views


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Presentation Transcript


  1. Instruction formats

  2. What is instructionformat? An instruction is normally made up of a combination of an operation code and some way of specifying an operand, most commonly by its location or address in memory

  3. Types of address instructions Three address instructions Memory addresses for the two operands and one destination need to be specified. It is also called General register organization. Instruction: ADD R1, R2, R3 Microoperation: R1 R2 +R3

  4. EVALUATE X=(A+B)*(C+D) ADD ADD MUL R1, A, B R2, C, D X, R1, R2 R1 M[A]+M[B] R2 M[C]+M[D] M[X] R1*R2 X=A+(B.C)+(D.E)

  5. Two addressinstructions Two address registers or two memory locations are specified Assumes that the destination address is the same as that of the first operand. Instruction: ADD R1, R2 Microoperation: R1 R1 +R2

  6. EVALUATE X=(A+B)*(C+D) MOV ADD MOV ADD MUL MOV R1, A R1, B R2, C R2, D R1,R2 X,R1 R1 M[A] R1 R1+M[B] R2 M[C] R2 R2+M[D] R1 R1*R2 M[X] R1 X=A+(B.C)+(D.E)

  7. One addressinstructions One address can be a register name or memory address. SINGLE ACCUMULATOR ORGANIZATION It uses AC register for all data manipulation Instruction: ADD X Microoperation: AC AC + M[X]

  8. EVALUATE X=(A+B)*(C+D) LOAD ADD STORE LOAD ADD MUL STORE A B T C D T X AC M[A] AC AC+M[B] M[T] AC AC M[C] AC AC+M[D] AC AC*M[T] M[X] AC X=A+(B.C)+(D.E)

  9. Zero addressinstruction Stack is used. Arithmetic operation pops two operands from the stack and pushes the result. Also called stack organization

  10. Zero address instruction Evaluate X = ( A +B ) * ( C +D ) PUSH A PUSH ADD TOS A TOS B TOS (A+B) Push A Push B ADD Push C Push D ADD Mult Store B TOS C PUSH C TOS D PUSH D TOS (C+D) TOS (C+D)*(A+B) M[X] TOS ADD MUL POP X

  11. Addressing Modes Addressing mode specifies a rule for interpreting or modifying the address field of the instruction before the operand is actually executed.

  12. Well known addressing modes- Implied mode Immediate mode Register mode Register indirect mode Autoincrement or Autodecrement Direct address mode Indirect address mode Relative address mode Indexed addressing mode Base register addressing mode

  13. Implied Mode In this mode the operands are specified implicitly in the definition of the instruction. All register reference instructions that use an accumulator are implied mode instruction. Example: CMA compliment accumulator.

  14. Immediate Addressing Data needed by the processor is contained in the instruction Operand= address field e.g-ADD 5 -add 5 to the content of accumulator -5 is the operand opcode Operand (5)

  15. Register Addressing Operand is held in register named in address field A k-bit field can specify any one of 2^k registers REGISTERS OPCODE REGISTER ADDRESS R OPERAND

  16. Register Indirect Addressing The selected register contains the address of the operand rather than the operand itself. REGISTER ADDRESS R OPCODE 500 REGISTERS OPERAND(72) R ADDRESS OF OPERAND(500) Memory

  17. Auto Increment orAuto Decrement Mode This is similar to the register indirect mode except that the register is incremented or decremented after or before its value is used to access memory. R1=400 1. Auto incr-E.A=400 R1 is incremented to 401after the execution 450 700 399 400 2. Auto decr-R1 is decremented prior to the execution,therefore,R1=399 and E.A=399

  18. RELATIVE ADDRESSMODE In this mode the content of the program counter is added to the address part of the instruction to obtain the effective address. Address(24) OPCODE MEMORY PC (825) 24 Effective850 826 + Address 826+24

  19. Indexed addressingmode In this mode the content of an index register is added to the address part of the instruction to obtain the effective address. opcode Rb Rt ADDRESS(20) 20 index register(1000) Memory E.A 1000 + operand 1020

  20. BASE REGISTER ADDRESSING MODE In this mode the content of a base register is added to the address part of the instruction to obtain the effective address. opcode Rb Rt ADDRESS REGISTER(400) Memory 100 400 + 500 42 E.A

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