Fundamental Concepts of Operating Systems
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Reading:
A&D CH2.1-7
HW: 0 out, due 9/8
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9/3/14
U
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1
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2
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2
Hardware
appln
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int main()
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“User Programs”
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9/3/14
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13
User Mode
Kernel Mode
Full HW access
Limited HW access
exception
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Copying OR reading another group’s code or test cases
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prior years
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submissions and online solutions and will take actions
(described on the course overview page) against offenders
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9/3/14
U
C
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C
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1
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2
F
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L
2
27
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9/3/14
U
C
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C
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1
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2
F
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4
L
2
28
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9/3/14
U
C
B
C
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1
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2
F
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L
2
29
interrupt number
(i)
intrpHandler_i () {….
}
Address and properties
of each interrupt handler
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9/3/14
U
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1
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F
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L
2
30
OS
Proc
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n
…
0000…
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1000…
1100…
3000…
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Base
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1100…
Bound
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uPC
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PC
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•
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9/3/14
U
C
B
C
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1
6
2
F
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1
4
L
2
31
OS
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n
…
0000…
FFFF…
1000…
1100…
3000…
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Base
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Bound
0000 1234
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PC
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•
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9/3/14
U
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C
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1
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2
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2
32
OS
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…
0000…
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Bound
0000 0248
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00D0…
•
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0001 0124
1000 …
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regs
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9/3/14
U
C
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2
33
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000 0248
1000 …
1100 …
0000 1234
regs
00FF…
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9/3/14
U
C
B
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1
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F
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L
2
34
x
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9/3/14
U
C
B
C
S
1
6
2
F
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1
4
L
2
35
CS
EIP
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EAX
EBX
code
Static Data
heap
stack
CS:
EIP:
SS:
ESP:
Processor Registers
Start address, length and
access rights associated
with each segment
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9/3/14
U
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L
2
36
R
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9/3/14
U
C
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1
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L
2
37
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9/3/14
U
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38
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9/3/14
U
C
B
C
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1
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2
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1
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L
2
39
if ( readyProcesses(PCBs) ) {nextPCB = selectProcess(PCBs);
run( nextPCB );
} else {run_idle_process();
}
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9/3/14
U
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L
2
40
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9/3/14
U
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L
2
41
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9/3/14
U
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42
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9/3/14
U
C
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C
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1
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2
F
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L
2
43
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This content covers essential concepts in operating systems, including privileged/user mode, address space management, processes, and protection mechanisms. It discusses the role of an operating system as a referee, illusionist, and glue in managing and abstracting hardware resources for applications.
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Introduction to the Process David E. Culler CS162 Operating Systems and Systems Programming Lecture 2 Sept 3, 2014 Reading: A&D CH2.1-7 HW: 0 out, due 9/8
Recall: What is an operating system? Special layer of software that provides application software access to hardware resources Convenient abstraction of complex hardware devices Protected access to shared resources Security and authentication Communication amongst logical entities appln applnappln OS Hardware 2 UCB CS162 Fa14 L2 9/3/14
What is an Operating System? Referee Manage sharing of resources, Protection, Isolation Resource allocation, isolation, communication Illusionist Provide clean, easy to use abstractions of physical resources Infinite memory, dedicated machine Higher level objects: files, users, messages Masking limitations, virtualization Glue Common services Storage, Window system, Networking Sharing, Authorization Look and feel 3 UCB CS162 Fa14 L2 9/3/14
Recall OS Basics: Loading Threads Address Spaces Windows Processes Files Sockets OS Hardware Virtualization Software Hardware ISA Memory Processor Protection Boundary OS Ctrlr Networks storage Displays Inputs 18 UCB CS162 Fa14 L1 8/31/14 4 UCB CS162 Fa14 L2 9/3/14
Today: four fundamental OS concepts Privileged/User Mode The hardware can operate in two modes, with only the system mode having the ability to access certain resources. Address Space Programs execute in an address space that is distinct from the memory space of the physical machine Process An instance of an executing program is a process consisting of an address space and one or more threads of control Protection The OS and the hardware are protected from user programs and user programs are isolated from one another by controlling the translation from program virtual addresses to machine physical addresses 5 UCB CS162 Fa14 L2 9/3/14
OS Bottom Line: Run Programs Memory Executable 0x000 Program Source instructions compiler Execute Load & int main() { ; } instructions editor data data heap a.out foo.c stack Load instruction and data segments of executable file into memory Create stack and heap Transfer control to it Provide services to it While protecting OS and it 9/3/14 OS 0xFFF PC: registers Processor 6 UCB CS162 Fa14 L2
Why no stack or heap in executable? What about data segment? 7 UCB CS162 Fa14 L2 9/3/14
Today we need one key 61B concept The instruction cycle Memory Processor next PC: Instruction fetch instruction decode Decode Registers Execute ALU data 8 UCB CS162 Fa14 L2 9/3/14
Key OS Concept: the Process Process = Execution of a Program with Restricted Rights User Programs Applications Operating System Boundary Process = Address Space with one or more threads of control Kernel Operating System 9 UCB CS162 Fa14 L2 9/3/14
Address Space 0x000 code Static Data heap stack 0xFFF What s in the code segment? Data? What s in the stack segment? How is it allocated? How big is it? What s in the heap segment? How is it allocated? How big? 10 UCB CS162 Fa14 L2 9/3/14
Thread of Control A thread is executing on a processor when it is resident in the processor registers. PC register holds the address of executing instruction in the thread. Certain registers hold the context of thread Stack pointer holds the address of the top of stack Other conventions: Frame Pointer, Heap Pointer, Data May be defined by the instruction set architecture or by compiler conventions Registers hold the root state of the thread. The rest is in memory 11 UCB CS162 Fa14 L2 9/3/14
In a Picture 0x000 Code Segment instruction Static Data heap stack 0xFFF PC: SP: Processor registers 12 UCB CS162 Fa14 L2 9/3/14
User/Kernal(Priviledged) Mode User Mode interrrupt exception syscall rtn rfi exit Kernel Mode exec Limited HW access Full HW access 13 UCB CS162 Fa14 L2 9/3/14
Multiprogramming - Multiple Processes code Proc 1 Proc 2 Proc n Static Data heap OS stack code Static Data heap stack code Static Data heap stack 14 UCB CS162 Fa14 L2 9/3/14
Dual Mode Operation What is needed in the hardware to support dual mode operation? a bit of state (user/system mode bit) Certain operations / actions only permitted in system/kernel mode In user mode they fail or trap User->Kernel transition sets system mode AND saves the user PC Operating system code carefully puts aside user state then performs the necessary operations Kernel->User transition clears system mode AND restores appropriate user PC return-from-interrupt 15 UCB CS162 Fa14 L2 9/3/14
Key OS Concept: Address Space Program operates in an address space that is distinct from the physical memory space of the machine 0x000 Processor Memory translator 0xFFF 16 UCB CS162 Fa14 L2 9/3/14
A simple address translation: B&B 0000 0000 code code Static Data Static Data heap heap stack Base Address stack 1000 1000 code Program address Static Data heap < Bound 0100 stack 1100 Can the pgm touch OS? Can it touch other pgms? FFFF 17 UCB CS162 Fa14 L2 9/3/14
A different base and bound 0000 0000 code code Static Data Static Data heap heap stack Base stack 1000 1000 code >= Program address Static Data heap < Bound 0100 stack 1100 Requires relocating loader Still protects OS and isolates pgm No addition on address path FFFF 18 UCB CS162 Fa14 L2 9/3/14
Key OS Concept: Protection Operating System must protect itself from user programs Reliability: compromising the operating system generally causes it to crash Security: limit the scope of what processes can do Privacy: limit each process to the data it is permitted to access Fairness: each should be limited to its appropriate share It must protect User programs from one another Primary Mechanism: limit the translation from program address space to physical memory space Can only touch what is mapped in Additional Mechanisms: Privileged instructions, in/out instructions, special registers syscall processing, subsystem implementation (e.g., file access right) 19 UCB CS162 Fa14 L2 9/3/14
Simple B&B: OS loads process 0000 code Proc 1 Proc 2 Proc n Static Data heap OS stack 1000 sysmode 1 code Base xxxx 0000 Static Data Bound xxxx FFFF heap uPC xxxx 1100 stack PC 3000 code regs Static Data heap 3080 stack FFFF 20 UCB CS162 Fa14 L2 9/3/14
Simple B&B: OS gets ready to switch 0000 code Proc 1 Proc 2 Proc n RTU Static Data heap OS stack 1000 sysmode 1 code Base 1000 0000 Static Data Bound 1100 FFFF heap uPC 0001 1100 stack PC 3000 code regs Static Data 00FF Priv Inst: set special registers RTU heap 3080 stack FFFF 21 UCB CS162 Fa14 L2 9/3/14
Simple B&B: Return to User 0000 code Proc 1 Proc 2 Proc n Static Data heap OS stack 1000 sysmode 0 code Base 1000 0000 Static Data Bound 1100 FFFF heap uPC xxxx 1100 stack PC 0001 3000 code regs Static Data 00FF heap How to return to system? 3080 stack FFFF 22 UCB CS162 Fa14 L2 9/3/14
Logistics Break 23 UCB CS162 Fa14 L2 9/3/14
Recall: Getting started Start homework 0 immediately Gets cs162-xx@cory.eecs.berkeley.edu (and other inst m/c) Github account Registration survey Vagrant virtualbox VM environment for the course Consistent, managed environment on your machine icluster24.eecs.berkeley.edu is same Get familiar with all the cs162 tools Submit to autograder via git Go to section Waitlist ??? Pull hw0, can get inst acct Will process at least weekly (thru early drop deadline) Only registered students will form project groups If cs162 is not for you now, please allow others to take it 24 UCB CS162 Fa14 L1 2/26/2025
Personal Integrity UCB Academic Honor Code: "As a member of the UC Berkeley community, I act with honesty, integrity, and respect for others." http://asuc.org/honorcode/resources/HC%20Guide%20for%20Syllabi.pdf 25 UCB CS162 Fa14 L1 2/26/2025
CS 162 Collaboration Policy Explaining a concept to someone in another group Discussing algorithms/testing strategies with other groups Helping debug someone else s code (in another group) Searching online for generic algorithms (e.g., hash table) Sharing code or test cases with another group Copying OR reading another group s code or test cases Copying OR reading online code or test cases from from prior years We compare all project submissions against prior year submissions and online solutions and will take actions (described on the course overview page) against offenders 26 UCB CS162 Fa14 L1 2/26/2025
3 types of Mode Transfer Syscall Process requests a system service, e.g., exit Like a function call, but outside the process Does not have the address of the system function to call Like a Remote Procedure Call (RPC) for later Marshall the syscall id and args in registers and exec syscall Interrupt External asynchronous event triggers context switch eg. Timer, I/O device Independent of user process Trap or Exception Internal synchronous event in process triggers context switch e.g., Protection violation (segmentation fault), Divide by zero, All 3 are an UNPROGRAMMED CONTROL TRANSFER Where does it go? 27 UCB CS162 Fa14 L2 9/3/14
How do we get the system target address of the unprogrammed control transfer? 28 UCB CS162 Fa14 L2 9/3/14
Interrupt Vector Address and properties of each interrupt handler interrupt number (i) intrpHandler_i () { . } Where else do you see this dispatch pattern? 29 UCB CS162 Fa14 L2 9/3/14
Simple B&B: User => Kernel 0000 code Proc 1 Proc 2 Proc n Static Data heap OS stack 1000 sysmode 0 code Base 1000 0000 Static Data Bound 1100 FFFF heap uPC xxxx 1100 stack PC 0000 1234 3000 code regs Static Data 00FF heap How to return to system? 3080 stack FFFF 30 UCB CS162 Fa14 L2 9/3/14
Simple B&B: Interrupt 0000 code Proc 1 Proc 2 Proc n Static Data heap OS stack 1000 sysmode 1 code Base 1000 0000 Static Data Bound 1100 FFFF heap 0000 1234 uPC 1100 stack PC IntrpVector[i] 3000 code regs Static Data 00FF heap How to save registers and set up system stack? 3080 stack FFFF 31 UCB CS162 Fa14 L2 9/3/14
Simple B&B: Switch User Process 0000 code Proc 1 Proc 2 Proc n RTU Static Data heap OS stack 1000 sysmode 1 code 1000 Base 3000 0000 Static Data 1100 Bound 0080 FFFF heap 0000 1234 0000 0248 uPC 1100 stack regs PC 0001 0124 3000 00FF code regs Static Data 00D0 heap How to save registers and set up system stack? 3080 stack FFFF 32 UCB CS162 Fa14 L2 9/3/14
Simple B&B: resume 0000 code Proc 1 Proc 2 Proc n RTU Static Data heap OS stack 1000 sysmode 0 code 1000 Base 3000 0000 Static Data 1100 Bound 0080 FFFF heap 0000 1234 xxxx xxxx uPC 1100 stack regs PC 000 0248 3000 00FF code regs Static Data 00D0 heap How to save registers and set up system stack? 3080 stack FFFF 33 UCB CS162 Fa14 L2 9/3/14
Whats wrong with this simplistic address translation mechanism? 34 UCB CS162 Fa14 L2 9/3/14
x86 segments and stacks code Static Data heap Processor Registers CS EIP stack SS ESP CS: code EIP: EAX EBX DS ES ECX EDX ESI EDI Static Data heap SS: Start address, length and access rights associated with each segment stack ESP: 35 UCB CS162 Fa14 L2 9/3/14
Virtual Address Translation Simpler, more useful schemes too! Give every process the illusion of its own BIG FLAT ADDRESS SPACE Break it into pages More on this later 36 UCB CS162 Fa14 L2 9/3/14
Running Many Programs ??? We have the basic mechanism to switch between user processes and the kernel, the kernel can switch among user processes, Protect OS from user processes and processes from each other Questions ??? How do we decide which user process to run? How do we represent user processes in the OS? How do we pack up the process and set it aside? How do we get a stack and heap for the kernel? Aren t we wasting are lot of memory? 37 UCB CS162 Fa14 L2 9/3/14
Process Control Block Kernel represents each process as a process control block (PCB) Status (running, ready, blocked, ) Register state (when not ready) Process ID (PID), User, Executable, Priority, Execution time, Memory space, translation, Kernel Scheduler maintains a data structure containing the PCBs Scheduling algorithm selects the next one to run 38 UCB CS162 Fa14 L2 9/3/14
Scheduler if ( readyProcesses(PCBs) ) { nextPCB = selectProcess(PCBs); run( nextPCB ); } else { run_idle_process(); } 39 UCB CS162 Fa14 L2 9/3/14
Putting it together: web server syscall syscall RTU RTU wait wait interrupt interrupt 40 UCB CS162 Fa14 L2 9/3/14
Digging Deeper: Discussion & Questions 41 UCB CS162 Fa14 L2 9/3/14
Implementing Safe Mode Transfers Carefully constructed kernel code packs up the user process state an sets it aside. Details depend on the machine architecture Should be impossible for buggy or malicious user program to cause the kernel to corrupt itself. Interrupt processing must not be visible to the user process (why?) Occurs between instructions, restarted transparently No change to process state What can be observed even with perfect interrupt processing? 42 UCB CS162 Fa14 L2 9/3/14
Kernel Stack Challenge Kernel needs space to work Cannot put anything on the user stack (Why?) Two-stack model OS thread has interrupt stack (located in kernel memory) plus User stack (located in user memory) Syscall handler copies user args to kernel space before invoking specific function (e.g., open) Interrupts (???) 43 UCB CS162 Fa14 L2 9/3/14
Hardware support: Interrupt Control Interrupt Handler invoked with interrupts disabled Re-enabled upon completion Non-blocking (run to completion, no waits) Pack it up in a queue and pass off to an OS thread to do the hard work wake up an existing OS thread OS kernel may enable/disable interrupts On x86: CLI (disable interrupts), STI (enable) Atomic section when select next process/thread to run Atomic return from interrupt or syscall HW may have multiple levels of interrupt Mask off (disable) certain interrupts, eg., lower priority Certain non-maskable-interrupts (nmi) e.g., kernel segmentation fault 44 UCB CS162 Fa14 L2 9/3/14
How do we take interrupts safely? Interrupt vector Limited number of entry points into kernel Kernel interrupt stack Handler works regardless of state of user code Interrupt masking Handler is non-blocking Atomic transfer of control Single instruction -like to change: Program counter Stack pointer Memory protection Kernel/user mode Transparent restartable execution User program does not know interrupt occurred
Kernel System Call Handler Locate arguments In registers or on user(!) stack Copy arguments From user memory into kernel memory Protect kernel from malicious code evading checks Validate arguments Protect kernel from errors in user code Copy results back into user memory
Multiprocessors - Multicores Multiple Threads What do we need to support Multiple Threads Multiple kernel threads? Multiple user threads in a process? What if we have multiple Processors / Cores 49 UCB CS162 Fa14 L2 9/3/14
Idle Loop & Power Measly do-nothing unappreciated trivial piece of code that is central to low-power 50 UCB CS162 Fa14 L2 9/3/14
