Electronics and DAQ Working Group TDR Status Update

Electronics and DAQ WG TDR status (7/15/24) 7/15/24 TIC meeting: Electronics & DAQ TDR Status 1

Electronics & DAQ WG TDR Plans (eg 2/19, 4/8, 5/13) TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status Components ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls 7/15/24 TIC meeting: Electronics & DAQ TDR Status 2

TDR - Strategy June 2024 PDR implies a high-level strategy: Aim for complete and detailed description of Electronics & DAQ for June Iterate based on feedback Iterate based on developments (2/19/24) 2-day, 2 part review 10-11 June, 2024 Ken Wyllie (CERN), Mitch Newcomer (UPenn), Prashansa Mukim (BML), Filippo Costa (CERN) lPGbt / vtrx+ (final design review) Electronics & DAQ PDR #2 (5/13 update) 6/11/24) lpGbt / vtrx+ FDR Recommended Suitability (and need for) CD3B Long Lead Procurement Comment #1 - Pig tail lengths to be defined 6 month before order (by CD3B review) Comment #2 - lpGbt be fully tested (all units) for 36.4 MHz operation (Review Results) PDR #2 Positive Response (All charge questions yes ) 13 Recommendations 7/15/24 TIC meeting: Electronics & DAQ TDR Status 3

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this 7/15/24 TIC meeting: Electronics & DAQ TDR Status 4

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) First two existing/in progress even if not presented during review Third details to be considered in INFN evaluation of optimization strategies w/vendors Fourth in process Databases of components Specification criteria Collection of Rad Test Results The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 5

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. Many open questions for slow controls, but some work deliberately left out of review ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components Scale estimates Lee s work defining system Tim s work specifying component (family) recommendations DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 6

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. 1. RDO / ASIC interfaces To be discussed in monthly ASIC updates in E&D WG The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. 2. GTU/DAM/RDO protocol 3. Time Frame Building 4. Data Formats Draft document exists (https://indico.bnl.gov/event/23989/) Implementation being done in TOF pre-prototype RDO Many details to discuss, finalize ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components Have had discussions need documentation Have had discussions need consensus/documentation DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 7

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components These needs and the plans for satisfying them are a major topic of the DAQ workfest next week! DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 Call out to any DSC s that wish to formally present (or discuss in real time) to contact our conveners and to attend the workfest! 8

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 We have clarity for some variants and not for others. This needs to be followed up on. 9

PDR Recommendation Summary (https://indico.bnl.gov/event/23925/) The teams are working towards well-defined specifications of the front-end ASICs for processing the detector signals. The requirements for ReadOut/DAQ/controls are less mature but acceptable for this stage of the project. The remaining steps to bring these to maturity appear to be well defined. ASICs Recommendations Management details (specifying review dates, monitoring progress) Detailed Documentation of FCFD operation Flip-chip/BGA integration strategies for ALCOR Rationalize approach for radiation qualification of COTS components DAQ/Controls Recommendations Slow Controls in next review Document details of DAQ operation (including the trigger scheme) Define DAQ/controls needs from sub-detectors in development stages Define responsibilities for RDO and DAM(firmware) variants More definition of the flow to the SRO at echelon 1, and plans for data challenges to test this TIC meeting: Electronics & DAQ TDR Status 7/15/24 A lot of this is in the context the SRO WG. The data challenge idea should be kept in mind but the integration of the echelon 1, and the progression of integration of echelon 1 as detectors/DAQ develop is also a topic of the workfest next Thursday.! 10

Questions 7/15/24 TIC meeting: Electronics & DAQ TDR Status 11

Backup 7/15/24 TIC meeting: Electronics & DAQ TDR Status 12

Electronics & DAQ WG TDR Plans TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status Components ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls Detector File With detector details: https://brookhavenlab.sharepoint.com/:t:/s/EICPublicSharingDocs/EdfFBd74VwRMpREG2m3nkfgBZ_AGEQMaCWMMJwnDrSj3Uw?e=wtlaE2 Presentation: https://indico.bnl.gov/event/22764/ Remaining Issues: RICH detectors Far Forward / Far Back (work in progress by detector groups) Synchrotron Radiation Noise (need thresholds > 4-5 sigma), thresholds increase with radiation damage 7/15/24 TIC meeting: Electronics & DAQ TDR Status 13

Electronics & DAQ WG TDR Plans TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status Components Fourth monthly eRD109 update meeting May 2nd https://indico.bnl.gov/event/23173/ Generally: ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls Discussions / Design efforts moving from pre-existing versions to (or towards) EIC designs EICROC development plan: EICROC1: 8x32 (256 ch) pfRICH, hpDIRC: FCFD/EICROCx Joint MPGD/E&DAQ WG Meeting on SALSA 18 April 2024 Finalizing specs: https://indico.bnl.gov/event/21137/ Starting to have some discussion about details of FEB interfaces #/type of serial connections Data rates Low level general components (DC/DC converters) 7/15/24 TIC meeting: Electronics & DAQ TDR Status 14

Electronics & DAQ WG TDR Plans TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status Time / Power cycle phase stability ~10ps using current devkits Still additional ideas to implement Yet to test on FELIX 182 Components RDO: Pre-prototype design progressing rapidly (6 boards fabricated end of April): ppRDO https://indico.bnl.gov/event/22905/ Planning internal review w/ engineers on design details, synergies for ppRDO and dRICH RDO (30 May 2024?) ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls FELIX 155: Omega to fabricate boards in two steps. Debug Board Evaluation Boards (we are in line for 2 of these) Discussed our contribution Our requests (William Gu) were favorably received and being incorporated Communication / sharing code Sharing our timing measurements for their upcoming review (early 2025) GTU: Timing measurements from William Gu Jitter ~3ps 7/15/24 TIC meeting: Electronics & DAQ TDR Status 15

Electronics & DAQ WG TDR Plans Joint meeting of SRO WG & Electronics and DAQ WG TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status https://docs.google.com/spreadsheets/d/1Rb5Cdjthkfh4IWWxFwHgiHNt Ms5cDxcahTTUN394cJ8/edit#gid=0 Components https://indico.bnl.gov/event/22764/ ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls Two plans for time frame / evaluation of time frame For TDR SRO reconstruction studies time frames to constructed by merging DIS / proton Beam Gas / electron Beam Gas / Synchrotron Radiation / Noise for .7ms time periods Event times to be randomly distributed on bunch crossings (no bunch structure), but the time distribution of individual events to be distributed appropriately Final ePIC Descriptions of DAQ structure Framework efforts Jana2 structure changes to allow splitting of frames and make events Compilation of calibration information Planning on upcoming meeting 7/15/24 TIC meeting: Electronics & DAQ TDR Status 16

Electronics & DAQ WG TDR Plans TDR Deliverables System Design Documents System Operation / Framework Data volumes Requirements Basis of Estimates Detailed Documentation Specifications Design Documents Engineering Drawings / Readout Chain Tests and results Status Components ASICs FEB RDOs DAM GTU EBDC Echelon 0 computing Echelon 1 computing (SRO) Slow Controls Lee Flader has compiled preliminary detector information for slow controls. Meeting with Deepak and his group simulation analysis on trigger with dRICH group. 7/15/24 TIC meeting: Electronics & DAQ TDR Status 17