ECE 2060 Lab 1: Combinatorial Logic Exploration
Explore combinatorial logic with ECE 2060 Lab 1. Construct AND and XOR gates, simulate with ModelSim, and delve into VHDL coding. Get hands-on experience in digital design.
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Presentation Transcript
ECE 2060 ECE 2060 Lab 1 Lab 1 Combinatorial Logic , Combinatorial Logic , ModelSim ModelSim, VHDL , VHDL Dr. Gregg J Chapman Spring 2021 1
ECE 2060 Lab 1 VIDEOS: 1. Lab 1 Video 2. ModelSim 3. Intro to VHDL 2
ECE 2060 Lab 1 Part 1 1. Construct an AND gate with Inputs A and B Output S Include a screenshot of the schematic in your lab report 2. Intro to VHDL Include your VHDL code in your lab report Include the block diagram that you created in your report 3e. Use ModelSim to simulate the gate Include a screenshot of the simulation in your lab report 3
ECE 2060 Lab 1 Part 2 1. Construct an XOR gate as shown in the video with Inputs A and B Output S Include a screenshot of the schematic in your lab report 2. Use ModelSim to simulate the XOR gate Include a screenshot of the simulation in your lab report 3. Intro to VHDL Include your VHDL code and a screenshot of the XOR block that you created in your lab report 4
