Advanced Concepts in Detector Design for High-Energy Physics Experiments
Advanced concepts in detector design for high-energy physics experiments are explored in this detailed document. It covers various aspects such as parameters, conceptual designs, radiation lengths of typical structures, thermal performance requirements, and cooling options. The content delves into specific details like silicon modules, ASIC dimensions, I/O board functionalities, thermal conductivity materials, and coolant options. The focus is on optimizing power dissipation, managing temperature rise, and ensuring efficient heat removal to maintain the performance of the detectors.
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Parameters Parameter Value Units Active Length 248.2 mm Active Width 80.6 mm Number of Quad Modules 12 Number of HV-CMOS ASICs 48 HV-CMOS ASIC Dimensions 20 x 22 mm 211.2 cm2 Total HV-CMOS area Total Power (@0.3W/cm2) 64 W
Tile Conceptual Design I/O Board. Receives power, control signals, CLK and trigger. Takes high-speed data from 48 ASICs & multiplexes together to a few multi-Gb (optical?) links HV-CMOS Quad Module (6 on top and 3 on bottom) with Hybrid based on Ilya Tsurin s RD53A design High-speed I/O Interconnect to route high speed signals from quads to I/O board Cables from under-side wrap around end and wire-bonded to I/O board Thermo-mechanical support
Radiation Lengths of Typical Structures ATLAS Itk Strip Power = 60mW/cm2 ATLAS ITk Pixel Power = 700mW/cm2 High thermal conductivity facings High thermal conductivity facings Thermally-conductive foam CO2 coolant in 2.5mm OD tube Thermally-conductive foam CO2 coolant in 2.5mm OD tube Support, electrical services & cooling: 1.5%Xo Support, electrical services & cooling: 0.7%Xo Rome CepC Meeting - CFRP Structures Development at Liverpool 24th May 2018 4
Thermal Performance Requirements Total power dissipated ~ 64W (quads) + I/O board (?) ATLAS Itk strip barrel stave ~ 2(sides) x 14(modules) x 6(W/module) ~180W ATLAS Itk pixel endcap HR ~ 2(sides) x 13 (quads) x 14 (quad area in cm2 ) x 0.7 (W/cm2) ~ 250W Cooling Options System Parameters Required HV-CMOS ASIC temperature = ?? C Required off/on temperature rise = ?? C Assume for now TASIC = 30 C and TOff/On = 20 C so coolant needs to be at 10 C Titanium tube 2-4mm ID with water/fluorinert/C6F14 maybe CO2 ? For monophase, absorbed power= (g/sec) x heat capacity (J/g/ C) x T ( C) 1 lpm of water will remove 70W with a 1 C rise in temperature along a 4mm bore tube Velocity = 1.3m/s and the Reynolds Number ~ 5200 (i.e. turbulent) For a smooth tube, the pressure across a 0.5m length tube = 40mb (Leakless no problem) How does the heat get into the tube ? Conduct heat along / through CFRP Embed tube in Allcomp thermally conductive foam & glue foam to CFRP How much of the space needs to be filled ? Fill remaining core with honeycomb/low density foam FEA High thermal conductivity facings CO2 coolant in 2.5mm OD tube Thermally-conductive foam
Cooling Options #2 Attach tile to secondary structure & remove heat through interfaces Passive tile support (no active cooling) Heat removed through physical interfaces to another structure (eg global support) Augment tile support thermal conductivity through high-tech materials or heat pipes (possible at room temperature)
Liverpool Expertise ATLASPix HVCMOS ASICs through Eva Quad hybrid through a development of Ilya s RD53a design for ATLAS pixels Thermo-mechanical FEA through TJ & Peter Sutcliffe Quad module assembly Expertise from ITK ACLCIA (ALICE ITS Outer Barrel) need effort to re-programme system ITK strip and Pixel mechanical structures Design for both coordinated by Peter Sutcliffe Manufacture of prototypes through Peter Cooke & Liverpool AML Test infrastructure through readout for ATLAS (pixels) Ilya Tsurin, Paul Dervan & Jon Taylor
