PCIe Latency and Performance Test on LX2160A

This document discusses PCIe latency and performance testing using Lmbench and DPDK qdma_demo on LX2160A hardware. It covers test configurations, latency measurements, throughput analysis, and peer-to-peer communication details.

• PCIe Testing
• Latency Analysis
• Performance Evaluation
• LX2160A
• Hardware Testing

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1. LX2160A PCIe Latency and Performance Test Huaixi Wei Sep 2021 COVER PAGE SUBTITLE PLACEHOLDER COMPANY CONFIDENTIAL

2. Introduction Background There is not an official data for PCIe latency and performance, while some customers pay attention to and request these data. This paper utilizes Lmbench lat_mem_rd tool and DPDK qdma_demo to test the PCIe latency and performance separately. Requirement 1) Plug Advantech iNIC (LX2160A) into LX2160ARDB. 2) Configure EP ATU outbound window at console. 3) Apply the patch to lmbench-3.0-a9, and recompile lmbench tool. 4) There is qdma_demo in iNIC kernel rootfs by default. 1 CONFIDENTIAL AND PROPRIETARY

3. Test Environment 2 CONFIDENTIAL AND PROPRIETARY

4. PCIe Latency Overview Direction Description read from EP to RC Read from EP to EP (through CCN-508) Read from EP to EP (through HSIO NOC) Latency(ns) 900 1550 PCIe(Gen3 x8) DDR PCIe PCIe DDR PCIe PCIe DDR 1500 Setup 1) 2) 3) LX2160ARDB iNIC PCIe EP Gen3 x8 with LX2160A Test App running at iNIC: Lmbench lat_mem_rd # ./lat_mem_rd_pcie -P 1 -t 1m 3 CONFIDENTIAL AND PROPRIETARY

5. PCIe Performance Overview Direction PCIe EP to EP Throughput (Gbps) 50 Setup 1) 2) 3) test_case=mem_to_pci LX2160ARDB iNIC PCIe EP Gen3 x8 with LX2160A Test App : qdma_demo running at iNIC $./qdma_demo -c 0x8001 -- --pci_addr=0x924fa00000 --packet_size=1024 -- 4 CONFIDENTIAL AND PROPRIETARY

6. Peer to Peer On LX2 Rev. 2 Outbound Window From: 0x92_0000_0000 To:0xa0_0000_0000 No iATU Pass Through 64b AXI transaction PEX Core Core ATU Core PEX3 ATU 48b AXI transaction from Core PCIe NOC LX2160 iNIC Controller 1 H S I O Outbound Window From: 0xa0_4000_0000 To: 0x00_4000_0000 SCFG: PCI Express Peer-to-peer support N I C Intbound Window BAR2 From: 0x00_4fa0_0000 To:0x00_9420_0000 Core address in 32 GB range PEX Core Latency L1 Cache (32KB) L2 Cache (1MB) L3 Cache (8MB) DDR(2900MTS) PCIe(4xGen3)-DDR PCIe-PCIe-DDR ns 2 12 40 150 900 ATU DDR PEX3 ATU PCIe LX2160 iNIC Controller N 1500(+50) 5 CONFIDENTIAL AND PROPRIETARY PCIe Bus

7. User Guide Name of Document URL readme.txt 6 CONFIDENTIAL AND PROPRIETARY

8. Software Source Code URL 001-support-pcie-latency-test.patch 7 CONFIDENTIAL AND PROPRIETARY

9. Products (Optional) Product Category MPU NXP Part Number URL LX2160A https://www.nxp.com/products/processors- and-microcontrollers/arm- processors/layerscape- processors/layerscape-lx2160a-lx2120a- lx2080a-processors:LX2160A https://www.nxp.com/design/software/embed ded-software/linux-software-and- development-tools/layerscape-software- development-kit:LAYERSCAPE-SDK LSDK software Layerscape Software Development Kit 8 CONFIDENTIAL AND PROPRIETARY

10. Tools (Optional) NXP Development Board LX2160ARDB URL https://www.nxp.com/design/qoriq-developer- resources/layerscape-lx2160a-reference- design-board:LX2160A-RDB Advantech ESP2120 Card 9 CONFIDENTIAL AND PROPRIETARY

11. Contact Information Provide the name, email address of the CAS interface, solution contributors NXP FAE Huaixi Wei 10 CONFIDENTIAL AND PROPRIETARY