Updates on CEPC Project Progress and Meetings for August 2024

This update covers the progress of CEPC project with a focus on the Technical Design Report (TDR), including TDAQ developments by Fei Li, Jinzhou Zhao, and Xiaolu Ji. It outlines periodic meetings, work plans, and group activities for August 2024. The Build Working Group's activity involving simulations, algorithms, and hardware development is detailed. Additionally, an update on the TDR Outline v3 highlights various aspects of system design, trigger requirements, data acquisition, and control systems for CEPC.

• CEPC Project
• TDR Outline
• Technical Design Report
• Meetings
• Progress

ertl_j Follow

Uploaded on Oct 02, 2024 | 0 Views

Download Presentation

Please find below an Image/Link to download the presentation.

The content on the website is provided AS IS for your information and personal use only. It may not be sold, licensed, or shared on other websites without obtaining consent from the author. Download presentation by click this link. If you encounter any issues during the download, it is possible that the publisher has removed the file from their server.

Presentation Transcript

1. Progress of CEPC ref-TDR TDAQ Fei Li, Jinzhou Zhao, Xiaolu Ji 2024.8.19

2. Periodic Meeting Editor bi-weekly meeting(Mon. afternoon) 2024.8.5, meeting schedule, work plan 2024.8.19, TDR outline v3, physics requirements and simulation status Project group bi-weekly meeting(Mon. afternoon) 2024.8.12 Review talk recall and discussion Work dividing Elec-TDAQ joint weekly meeting(Thu. morning) RADAR software bi-weekly meeting(Fri. morning)

3. Build Working Group(8 staff + 7 students) Trigger simulation and algorithm(1) Boping Chen Generic hardware trigger(3+1) Jingzhou Zhao, Sheng Dong, Dong Liu, Zhenan Liu RDMA readout protocol(1+1.5) Hongyu Zhang, Chang Xu(FPGA), Xiangyi Mu(Host), ShengDong Memory based distributed file system(1+1) Minhao Gu, Hangchang Zhang RADAR software framework/Heterogeneous computing(2+3.5) Fei Li + Xiaolu Ji Xu Zhang(framework/algorithm)+ Pengfei Xiao(GPU/CPU) + Xiangyi Mu + Yuan Shi DRD7.5c DRD7.5b DRD7.5a

4. Update TDR Outline v3 Introduction Physics Motivation Physics Signatures with sub-detectors Physics requirements Requirements and design considerations Event rate estimation & background rate estimation Trigger requirements for sub-detectors TDAQ Interface with electronics TDAQ policy consideration Trigger primitives generation and trigger algorithms Sub-detectors primitives System architecture Reconstruction algorithms Implementation, latency and data volumes Summary of trigger input bandwidth and latency Triggering on particles Vertex reconstruction Global trigger algorithms Level-1 trigger menu Hardware Trigger System Hardware trigger strategy Electronics interface Trigger Board Trigger Control and Distribution Software and high level trigger Data Acquisition Requirements Overview of System Functionality Detector Readout Dataflow Network Online Software Detector Control System Requirements on sub-detectors On-detector monitoring consideration On-detector slow control consideration Electronics monitoring and control consideration Experiment Control System Requirements Online Data Center IT Infrastructure and Systems Control Network Operating Systems Core Computing Services Summary Summary on data volume Summary on cost