UART Serial Port Programming Guide with Diagrams
Explore the world of UART serial port programming through detailed diagrams covering topics like serial vs. parallel data transfer, simplex, half-duplex, and full-duplex transfers, RS232 pins, and more. Learn about UART0 registers and their functions in MSP432 LaunchPad board.
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Presentation Transcript
Chapter 4 UART Serial Port Programming 1
MAX232 7
MAX233 8
RS232 Pins Pin 1 2 3 4 5 6 7 8 9 Description Data carrier detect (DCD) Received data (RxD) Transmitted data (TxD) Data terminal ready (DTR) Signal ground (GND) Data set ready (DSR) Request to send (RTS) Clear to send (CTS) Ring indicator (RI) 9
Partial list of UART0 Registers and their addresses Register Name Register Function Register Address UCA0CTLW0 Control Word 0 4000_1000 UCA0BRW Baud Rate Control Word 4000_1006 UCA0STATW Status 4000_100A UCA0RXBUF Receive Buffer 4000_100C UCA0TXBUF Transfer Buffer 4000_100E UCA0IFG Interrupt Flag 4000_101C 14
UART Control 0 Word (UCAxCTLW0) register Field Bit Description 0b = Parity disabled 1b = Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). 0b = Odd parity 1b = Even parity 0b = LSB first 1b = MSB first 0b = 8-bit data 1b = 7-bit data 0b = One stop bit 1b = Two stop bits 00b = UART mode 01b = Idle-line multiprocessor mode 10b = Address-bit multiprocessor mode 11b = UART mode with automatic baud-rate detection 0b = Asynchronous mode 1b = Synchronous mode UCPEN D15 UCPAR D14 UCMSB D13 UC7BIT D12 UCSPB D11 D10: 9 UCMODEx 17 UCSYNC D8
UART Control 0 Word (UCAxCTLW0) register (Cont.) Field Bit Description 00b = UCLK 01b = ACLK 10b = SMCLK 11b = SMCLK UCSSELx D7:6 0b = Erroneous characters rejected and UCRXIFG is not set. 1b = Erroneous characters received set UCRXIFG. 0b = Received break characters do not set UCRXIFG. 1b = Received break characters set UCRXIFG. UCRXEIE D5 UCBRKIE D4 0b = Not dormant. All received characters set UCRXIFG. 1b = Dormant. Only characters that are preceded by an idle-line or with address bit set UCRXIFG. In UART mode with automatic baud-rate detection, only the combination of a break and synch field sets UCRXIFG. UCDORM D3 0b = Next frame transmitted is data. 1b = Next frame transmitted is an address. 0b = Next frame transmitted is not a break. 1b = Next frame transmitted is a break or a break/synch. 0b = Disabled. eUSCI_A reset released for operation. 1b = Enabled. eUSCI_A logic held in reset state. UCTXADDR D2 18 UCTXBRK D1 UCSWRST D0
UART Control Word 1(UCAxCTLW1) register Field Bit Description Reserved D15:1 Reserved Deglitch time 00b = Approximately 2 ns 01b = Approximately 50 ns 10b = Approximately 100 ns 11b = Approximately 200 ns UCGLITx D0 20
UCAxMCTLW (UCOS16=0 for non- oversampling) 22
UCAxBRW 23
UART0 BRW Values for Some Standard Baud Rates using default OSCO16=0 and Clock of 3 MHz Baud rate 4,800 9,600 19,200 38,400 115,200 BRW (in decimal) 625 312 156 78 26 BRW (in hex) 0x271 0x138 0x9C 0x4E 0x1A 24
UART Status Register (UCAxSTATW) Field Reserved UCFE Bit D15:8 D6 Description Reserved Framing error flag. UCFE is cleared when UCAxRXBUF is read. 0b = No error 1b = Character received with low stop bit Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read. 0b = No error 1b = Overrun error occurred Parity error flag. When UCPEN = 0, UCPE is read as 0. UCPE is cleared when UCAxRXBUF is read. 0b = No error 1b = Character received with parity error Receive error flag. This bit indicates a character was received with one or more errors. When UCRXERR = 1, on or more error flags, UCFE, UCPE, or UCOE is also set. UCRXERR is cleared when UCAxRXBUF is read. 0b = No receive errors detected 1b = Receive error detected eUSCI_A busy. This bit indicates if a transmit or receive operation is in progress. 0b = eUSCI_A inactive 1b = eUSCI_A transmitting or receiving UCOE D5 UCPE D4 UCRXERR D2 27 UCBUSY D0
UART Interrupt Flag (UCAxIFG) and Interrupt Enable (UCAxIE) Registers 28
PxSEL1 and PxSEL0 Alternate Function Selection registers 29
Pins available for UARTs I/O pin P1.2 P1.3 FOR UART0: P2.2 P2.3 For UART1 P3.2 P3.3 For UART2 P9.6 P9.7 For UART3 Function UCA0RXD UCA0TXD PxSEL1=0 P1SEL1=00000000 P1SEL1=00000000 P1SEL1=0x00 P2SEL1=00000000 P2SEL1=00000000 P2SEL1=0x00 P3SEL1=00000000 P3SEL1=00000000 P3SEL1=0x00 P9SEL1=00000000 P9SEL1=00000000 P9SEL1=0x00 PxSEL0=1 P1SEL0=00000100 P1SEL0=00001000 P1SEL0=00001100=0x0C P2SEL0=00000100 P2SEL0=00001000 P2SEL0=00001100=0x0C P3SEL0=00000100 P3SEL0=00001000 P3SEL0=00001100=0x0C P9SEL0=01000000 P9SEL0=10000000 P9SEL0=11000000=0xC0 UCA1RXD UCA1TXD UCA2RXD UCA2TXD UCA3RXD UCA3TXD 30
