Development of GR740 Single Board Computer Reference Design by RUAG Space and Partners

RUAG Space collaborates with Gaisler and other partners in the development of a GR740-based single board computer reference design funded by ESA. The project aims to create an advanced technology platform for future space projects, leveraging RUAG's expertise in electronics and digital computers for space applications. The consortium, comprising Cobham Gaisler and ESA, is responsible for various aspects of the project, including hardware design, software development, and system architecture. Airbus Defence and Space, OHB System, and Thales Alenia Space provide valuable input as reference customers, contributing to the overall requirements and design of the GR740 SBC. The ultimate goal is to create a versatile and reliable platform accessible to European space users.

• RUAG Space
• GR740
• ESA
• Space Technology
• Single Board Computer

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1. GR740 Reference Design Thomas Badinand Marketing & Sales Manager RUAG Space AB ESA GR740 day 2019-11-28

2. Reference design and basic software for a single board computer based on GR740 The project is a technology development activity funded by ESA RUAG is responsible for design and manufacturing of the reference design board, test equipment and validation. Cobham Gaisler is the responsible for design of the FPGA and Software design RUAG and Gaisler, with input from external reference customers , share the responsibility to finalize the requirements of the reference design board The purpose of the board is to provide a possibility for early design for coming flight projects 2 21.09.2024 RUAG Space

3. Why RUAG Space with Gaisler? RUAG Space has extensive experience in developing electronics digital computers for space Experience of GR740 One of RUAG Space latest product is a Single Board Computer in VPX format Companies are close geographically (Gothenburg region) 3 21.09.2024 RUAG Space

4. Main objectives To create a reference design, available to all European space users, a single board computer using the GR740 Reference design data package Development of Elegant Breadboard Verified at functional and performance level (TRL 4) Supported by a Qualification Test Plan Accompanied by Boot software and Board Support Package & Device drivers 4 21.09.2024 RUAG Space

5. Consortium Cobham Gaisler ESA contractor and responsible for the overall activity Software design FPGA design Contributing to system architecture and hardware design and analyses RUAG Space in Sweden Responsible for hardware design and validation Responsible for significant parts of the hardware analyses RUAG Space in Finland Responsible for EBB Test Equipment and test cases Supervision of manufacturing of the Test Equipment Reference customer representatives 5 21.09.2024 RUAG Space

6. Involvement of the reference customers Airbus Defence and Space OHB System Thales Alenia Space Contribution: Input to the requirements and the architecture of the GR740 SBC General features, form factors and hardware and software aspects Support to the overall plans focusing on interfaces and risk assessments, and participation in the SRR. 6 21.09.2024 RUAG Space

7. Block diagram of Reference Design The Proposed design is illustrated in the figure. Basis for the hardware reference design and the EBB. The final block diagram for the EBB will be elaborated in the activity Trade-offs expected between for example the amount external interfaces, board form factor and backplane adaptations. Blocks with dashed border: foreseen extensions to the reference design, not fully covered in baseline reference design. 7 21.09.2024 RUAG Space

8. Basic Software Based on GRBOOT from Cobham Gaisler Board Support Package (BSP) will adapted to the new SBC design. A standby monitor will be developed supporting PUS services over SpaceWire by reusing the standby monitor developed in previous activities 8 21.09.2024 RUAG Space

9. Prerequisites for the design Compatible with backplane standard Candidates such as SpaceVPX (VITA 78.0) or Serial cPCI for Space Not larger than 6U GR740 Backplane expected to support High Speed Serial Link (HSSL) FPGA for I/O interface flexibility Adapted to expected market needs Detailed design and interface allocation to be defined 9 21.09.2024 RUAG Space

10. EBB Descoped variant of the Reference Design Possibly reduced amount of backplane interfaces Possibly reduced amount of external (front) I/O interfaces Unchanged processing performance Potential extensions compared to the Reference Design (e.g. HSSL) Form factor 3U or 6U To be developed, manufactured and validated in the activity 10 21.09.2024 RUAG Space

11. Schedule Kick off reached mid October 2019 Initial user need collection phase ongoing SRR planned for February 2020 PDR planned for Q2 2020 Detailed design and CDR to be finalised Q4 2020 Product validated and available for use Q4 2021 11 21.09.2024 RUAG Space

12. Thank you for your attention! 12 21.09.2024 RUAG Space