Clock Synchronization Distribution For Data Taking Systems

The content details the clock synchronization distribution system for data taking systems requiring specific clock frequencies for various subsystems to ensure synchronous data processing. It covers the setup, external clock relationships, and generation specifics involving different clock frequencies and phase locking requirements. The system is designed to maintain precise timing across subsystems for effective data collection and processing.

• Clock Synchronization
• Data Taking Systems
• Clock Frequencies
• Phase Locking
• Subsystem Integration

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1. CLOCK / SYNC Distribution mCBM J.Fr hauf 17. August 2018

2. Needed Clocks 40MHz for AFCK Logic 120MHz for GBTx Logic 160MHz for TOF FEE n x 40MHz CLK for STS/MUCH and TRD recovered from the optical link CLK of the GBTx SYNC Pulse for AFCK and ToF-FEE 120MHz for GBTx needs to be phase locked to the 40MHz/160MHz for ToF to guarantee a synchronous data taking between subsystems 9/29/2024 Jochen Fr hauf 2

3. SETUP 1: External CLKs 160MHz SYNC TOF FEE 160MHz Splitter CLOSY 2 CLOSY 1 40MHz 160MHz SYNC TRD FEE n x 40MHz 120MHz 40MHz MUCH FEE n x 40MHz SYNC STS FEE 4 x 40MHz Optic Splitter gDPB ADDON gDPB ADDON gDPB ADDON gDPB ADDON FM-S18 FM-S18 FM-S18 FM-S18 AFCK AFCK AFCK AFCK ... 3 9/29/2024 Jochen Fr hauf

4. CLK Relationship for ToF (SETUP 1) CLOSY 1 Only one point to tune! All other relationships are given by cable delays and fix for a given setup phase locked 40MHz CLOSY 2 160MHz SYNC be carful: 120MHz and 160MHz are phase locked to each other but the phase can change after each power cycle of - CLOSY - GBTx Core Reset (FPGA) 120MHz phase locked SYNC tune here! 80Mbit 120MHz AFCK (160MHz) Rx Tx GBTx GET4 Tx Rx CLOSY1: CLOSY2: AFCK: GBTx: GET4: 120MHz & 40MHz phase locked 160MHz phase locked to 40MHz from CLOSY1 120MHz from CLOSY1 for GBTx and generate 160MHz for logic 120MHz from AFCK = Phase locked to CLOSY2 160MHz for GET4 160MHz from CLOSY2 = Phase locked to 120MHz from CLOSY1 = Phase locked to 120MHz for GBTx GET4 Rx use 4 times oversampling GET4 Tx needs to be phase controlled on the GBTx side 9/29/2024 Jochen Fr hauf 4

5. AFCK ZOOM IN External CLk from CLOSY 120MHz 120MHz 120MHz Switch SYNC 120MHz PLL 160MHz LOGIC & TIME CNT GBTx Core DATA 120MHz for GBTx 9/29/2024 Jochen Fr hauf 5

6. SETUP 1: External CLK generation 1. CLOSY1 Generate 120MHz and 40MHz 120MHz for AFCK/GBTx 40MHz for CLOSY 2 2. CLOSY2 generates phase locked to 40MHz from CLOSY1: 160MHz for ToF FEE SYNC for AFCK and ToF FEE 3. AFCK generate phase locked 40MHz for logic out of 120MHz from GBTx Core CLK for FEE (except ToF FEE) from GBTx 9/29/2024 Jochen Fr hauf 6

7. SETUP 2: External 40MHz CLK for AFCK Internal 120MHz generation for GBTx 160MHz SYNC TOF FEE 160MHz Splitter 160MHz SYNC TRD FEE n x 40MHz 40MHz MUCH FEE n x 40MHz 40MHz SYNC STS FEE n x 40MHz Optic Splitter 40MHz SYNC RJ45 ADDON RJ45 ADDON RJ45 ADDON RJ45 ADDON FM-S18 FM-S18 FM-S18 FM-S18 AFCK AFCK AFCK AFCK ... 7 9/29/2024 Jochen Fr hauf

8. CLK Relationship for ToF (SETUP 2) Only one point to tune! All other relationships are given by cable delays and fix for a given setup 160MHz SYNC CLOSY be carful: 120MHz and 160MHz are phase locked to each other but the phase can change after each power cycle of - CLOSY - AFCK - GBTx Core Reset (FPGA) 40MHz SYNC tune here! 80Mbit 120MHz AFCK (160MHz) Rx Tx GBTx GET4 Tx Rx CLOSY: AFCK: GBTx: GET4: 160MHz & 40MHz phase locked 40MHz from CLOSY to control 120MHz for GBTx and generate 160MHz for logic 120MHz from AFCK = Phase Controlled by 40MHz from CLOSY 160MHz from CLOSY = Phase locked to 40MHz for AFCK = Phase locked to 120MHz for GBTx GET4 Rx use 4 times oversampling GET4 Tx needs to be phase controlled on the GBTx side 9/29/2024 Jochen Fr hauf 8

9. AFCK ZOOM IN External CLk from CLOSY 40MHz SYNC Phase locked 40MHz 40MHz PLL Phase Tuner SYNC SILAB 160MHz 120MHz LOGIC & TIME CNT GBTx Core 120MHz DATA 120MHz for GBTx 9/29/2024 Jochen Fr hauf 9

10. SETUP 2: Internal 120MHz generation synchronize Si570 on FM-S18 with PLL design as it's done in White Rabbit 2 external 40MHz from CLOSY will be the reference CLK for this solution (suggested by Adrian Byszuk) CLK for FEE (except ToF FEE) from GBTx 9/29/2024 Jochen Fr hauf 10