Understanding Multiplexers in Electronics

 
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A multiplexer is a combinational circuit that selects binary
information from one of many input lines and directs it to a single
output line.
The selection of a particular input line is controlled by a set of
selection lines. Normally, there are 2
n
 
input lines and 
n 
selection lines
whose bit combinations determine which input is selected.
 
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A multiplexer is also called a 
data selector 
, since it selects one of
many inputs and steers the binary information to the output line.
The size of a multiplexer is specified by the number 2
n
 
of its data
input lines and the single output line. The 
n 
selection lines are implied
from the 2
n
 
data lines
 
Applications
 
In electronics, a multiplexer or mux is a device that selects one of several analog
or digital input signals and forwards the selected input into a single line. An
electronic multiplexer can be considered as a multiple-input, single-output switch
i.e. digitally controlled multi-position switch. The digital code applied at the select
inputs determines which data inputs will be switched to output.
A common example of multiplexing or sharing occurs when several peripheral
devices share a single transmission line or bus to communicate with computer.
Each device in succession is allocated a brief time to send and receive data. At any
given time, one and only one device is using the line. This is an example of time
multiplexing since each device is given a specific time interval to use the line.
In frequency multiplexing, several devices share a common line by transmitting at
different frequencies.
 
2-to-1 line Multiplexer
 
A two-to-one-line multiplexer connects
one of two 1-bit sources to a common
destination,
The circuit has two data input lines, one
output line, and one selection line 
S 
.
 
2-to-1 line Multiplexer
 
When 
S 
= 0, the upper AND gate
is enabled and 
I
0
 has a path to
the output.
When 
S 
= 1, the lower AND gate
is enabled and 
I
1
 has a path to
the output.
The multiplexer acts like an
electronic switch that selects
one of two sources
 
4-to-1 line Multiplexer
 
A four-to-one-line multiplexer
has four inputs, 
I
0 
through 
I
3
,
each input is applied to one
input of an AND gate.
Selection lines 
S
1 and 
S
0 are
decoded to select a particular
AND gate.
The outputs of the AND gates
are applied to a single OR gate
that provides the one-line
output.
 
 
To demonstrate the operation of
the circuit, consider the case when
S
1
S
0
 = 10.
The AND gate associated with input
I
2
 has two of its inputs equal to 1
and the third input connected to 
I
2
.
The other three AND gates have at
least one input equal to 0, which
makes their outputs equal to 0. The
output of the OR gate is now equal
to the value of 
I
2
, providing a path
from the selected input to the
output.
 
Quadruple  2-to-1-line
 
Multiplexer circuits can be combined with common selection inputs
to provide multiple-bit selection logic
A quadruple 2-to-1-line multiplexer circuit has four multiplexers, each
capable of selecting one of two input lines.
Input selection line 
S 
selects one of the lines in each of the four
multiplexers. The enable input 
E 
must be active (i.e., asserted) for
normal operation.
Although the circuit contains four 2-to-1-line multiplexers, we are
more likely to view it as a circuit that selects one of two 4-bit sets of
data lines
 
Decoder as MUX
 
As in decoders, multiplexers may
have an enable input to control
the operation of the unit.
When the enable input is in the
inactive state, the outputs are
disabled, and when it is in the
active state, the circuit functions
as a normal multiplexer.
 
4-to-1 line Multiplexer using Decoder
 
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A decoder can be used to implement Boolean functions by employing
external OR gates.
An examination of the logic diagram of a multiplexer reveals that it is
essentially a decoder that includes the OR gate within the unit. The
minterms of a function are generated in a multiplexer by the circuit
associated with the selection inputs. The individual minterms can be
selected by the data inputs, thereby providing a method of
implementing a Boolean function of 
n 
variables with a multiplexer
that has 
n 
selection inputs and 2
n 
data inputs, one for each minterm.
 
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consider the Boolean function
F 
(
x
, 
y
, 
z
) = (1, 2, 6, 7)
This function of three variables
can be implemented with a 4-to-
1-line multiplexer.
The two variables 
x 
and 
y 
are
applied to the selection lines in
that order; 
x 
is connected to the
S
1 input and 
y 
to the 
S
0 input.
The values for the data input
lines are determined from the
truth table of the function
 
implementation of the Boolean function
F 
(
A
, 
B
, 
C
, 
D
) = (1, 3, 4, 11, 12, 13, 14, 15)
 
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A demultiplexer (or demux) is a device taking a single input signal and
selecting one of many data-output-lines, which is connected to the single
input. A multiplexer is often used with a complementary demultiplexer on
the receiving end. A demultiplexer is a single-input, multiple-output switch.
Demultiplexers take one data input and a number of selection inputs, and
they have several outputs. They forward the data input to one of the
outputs depending on the values of the selection inputs.
Demultiplexers are sometimes convenient for designing general purpose
logic, because if the demultiplexer's input is always true, the demultiplexer
acts as a decoder. This means that any function of the selection bits can be
constructed by logically OR-ing the correct set of outputs. Demultiplexer is
called as a ‘distributro’, since it transmits the same data to different
destinations.
 
 
1-to-4 DEMUX
 
Truth table, block diagram, logic circuit design
 
Truth Table of 1:8 DEMUX
 
Logic Diagram of 1:8 DEMUX
 
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A multiplexer can be constructed with three-state gates—digital circuits
that exhibit three states. Two of the states are signals equivalent to logic 1
and logic 0 as in a conventional gate.
The third state is a 
high-impedance 
state in which (1) the logic behaves like
an open circuit, which means that the output appears to be disconnected,
(2) the circuit has no logic significance, and (3) the circuit connected to the
output of the three-state gate is not affected by the inputs to the gate.
The high-impedance state of a three-state gate provides a special feature
not available in other gates. Because of this feature, a large number of
three-state gate outputs can be connected with wires to form a common
line without endangering loading effects.
 
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Three-state gates may perform any conventional logic, such as AND or
NAND. However, the one most commonly used is the buffer gate.
It is distinguished from a normal buffer by an input control line
entering the bottom of the symbol. The buffer has a normal input, an
output, and a control input that determines the state of the output.
When the control input is equal to 1, the output is enabled and the
gate behaves like a conventional buffer, with the output equal to the
normal input. When the control input is 0, the output is disabled and
the gate goes to a high-impedance state, regardless of the value in
the normal input.
 
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2-to-1 line MUX with three state
gates
 
Three state buffer
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A multiplexer, or mux, is a key component in electronics that selects and directs binary information from multiple input lines to a single output line. It functions as a data selector, enabling the efficient flow of information in electronic circuits. This article explores the working principle, applications, and examples of 2-to-1 and 4-to-1 line multiplexers, shedding light on their importance in modern electronic systems.


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  1. MULTIPLEXERS MULTIPLEXERS

  2. MULTIPLEXERS MULTIPLEXERS A multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines. Normally, there are 2ninput lines and n selection lines whose bit combinations determine which input is selected.

  3. MULTIPLEXERS MULTIPLEXERS A multiplexer is also called a data selector , since it selects one of many inputs and steers the binary information to the output line. The size of a multiplexer is specified by the number 2nof its data input lines and the single output line. The n selection lines are implied from the 2ndata lines

  4. Applications In electronics, a multiplexer or mux is a device that selects one of several analog or digital input signals and forwards the selected input into a single line. An electronic multiplexer can be considered as a multiple-input, single-output switch i.e. digitally controlled multi-position switch. The digital code applied at the select inputs determines which data inputs will be switched to output. A common example of multiplexing or sharing occurs when several peripheral devices share a single transmission line or bus to communicate with computer. Each device in succession is allocated a brief time to send and receive data. At any given time, one and only one device is using the line. This is an example of time multiplexing since each device is given a specific time interval to use the line. In frequency multiplexing, several devices share a common line by transmitting at different frequencies.

  5. 2-to-1 line Multiplexer A two-to-one-line multiplexer connects one of two 1-bit sources to a common destination, The circuit has two data input lines, one output line, and one selection line S . Y S 0 I0 I1 1

  6. 2-to-1 line Multiplexer When S = 0, the upper AND gate is enabled and I0has a path to the output. When S = 1, the lower AND gate is enabled and I1 has a path to the output. The multiplexer acts like an electronic switch that selects one of two sources

  7. 4-to-1 line Multiplexer A four-to-one-line multiplexer has four inputs, I0 through I3, each input is applied to one input of an AND gate. Selection lines S1 and S0 are decoded to select a particular AND gate. The outputs of the AND gates are applied to a single OR gate that provides the one-line output.

  8. To demonstrate the operation of the circuit, consider the case when S1S0 = 10. The AND gate associated with input I2 has two of its inputs equal to 1 and the third input connected to I2. The other three AND gates have at least one input equal to 0, which makes their outputs equal to 0. The output of the OR gate is now equal to the value of I2, providing a path from the selected input to the output.

  9. Quadruple 2-to-1-line Multiplexer circuits can be combined with common selection inputs to provide multiple-bit selection logic A quadruple 2-to-1-line multiplexer circuit has four multiplexers, each capable of selecting one of two input lines. Input selection line S selects one of the lines in each of the four multiplexers. The enable input E must be active (i.e., asserted) for normal operation. Although the circuit contains four 2-to-1-line multiplexers, we are more likely to view it as a circuit that selects one of two 4-bit sets of data lines

  10. Decoder as MUX As in decoders, multiplexers may have an enable input to control the operation of the unit. When the enable input is in the inactive state, the outputs are disabled, and when it is in the active state, the circuit functions as a normal multiplexer. 4-to-1 line Multiplexer using Decoder

  11. Boolean Function Implementation Boolean Function Implementation A decoder can be used to implement Boolean functions by employing external OR gates. An examination of the logic diagram of a multiplexer reveals that it is essentially a decoder that includes the OR gate within the unit. The minterms of a function are generated in a multiplexer by the circuit associated with the selection inputs. The individual minterms can be selected by the data inputs, thereby providing a method of implementing a Boolean function of n variables with a multiplexer that has n selection inputs and 2n data inputs, one for each minterm.

  12. Boolean Function Implementation Boolean Function Implementation consider the Boolean function F (x, y, z) = (1, 2, 6, 7) This function of three variables can be implemented with a 4-to- 1-line multiplexer. The two variables x and y are applied to the selection lines in that order; x is connected to the S1 input and y to the S0 input. The values for the data input lines are determined from the truth table of the function

  13. implementation of the Boolean function F (A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)

  14. Demultiplexer Demultiplexer A demultiplexer (or demux) is a device taking a single input signal and selecting one of many data-output-lines, which is connected to the single input. A multiplexer is often used with a complementary demultiplexer on the receiving end. A demultiplexer is a single-input, multiple-output switch. Demultiplexers take one data input and a number of selection inputs, and they have several outputs. They forward the data input to one of the outputs depending on the values of the selection inputs. Demultiplexers are sometimes convenient for designing general purpose logic, because if the demultiplexer's input is always true, the demultiplexer acts as a decoder. This means that any function of the selection bits can be constructed by logically OR-ing the correct set of outputs. Demultiplexer is called as a distributro , since it transmits the same data to different destinations.

  15. 1-to-4 DEMUX Truth table, block diagram, logic circuit design

  16. Truth Table of 1:8 DEMUX

  17. Logic Diagram of 1:8 DEMUX

  18. Three Three- -State Gates State Gates A multiplexer can be constructed with three-state gates digital circuits that exhibit three states. Two of the states are signals equivalent to logic 1 and logic 0 as in a conventional gate. The third state is a high-impedance state in which (1) the logic behaves like an open circuit, which means that the output appears to be disconnected, (2) the circuit has no logic significance, and (3) the circuit connected to the output of the three-state gate is not affected by the inputs to the gate. The high-impedance state of a three-state gate provides a special feature not available in other gates. Because of this feature, a large number of three-state gate outputs can be connected with wires to form a common line without endangering loading effects.

  19. Three Three- -State Gates State Gates Three-state gates may perform any conventional logic, such as AND or NAND. However, the one most commonly used is the buffer gate. It is distinguished from a normal buffer by an input control line entering the bottom of the symbol. The buffer has a normal input, an output, and a control input that determines the state of the output. When the control input is equal to 1, the output is enabled and the gate behaves like a conventional buffer, with the output equal to the normal input. When the control input is 0, the output is disabled and the gate goes to a high-impedance state, regardless of the value in the normal input.

  20. Three Three- -State Gates State Gates 2-to-1 line MUX with three state gates Three state buffer

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